mc68hc908bd48 Freescale Semiconductor, Inc, mc68hc908bd48 Datasheet - Page 101

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mc68hc908bd48

Manufacturer Part Number
mc68hc908bd48
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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7.6.1.2 SWI Instruction
7.6.2 Interrupt Status Registers
MC68HC908BD48
Freescale Semiconductor
NOTE:
NOTE:
Rev. 2.1
The LDA opcode is pre-fetched by both the INT1 and INT2 RTI
instructions. However, in the case of the INT1 RTI pre-fetch, this is a
redundant operation.
To maintain compatibility with the M6805 Family, the H register is not
pushed on the stack during interrupt entry. If the interrupt service routine
modifies the H register or uses the indexed addressing mode, software
should save the H register and then restore it prior to exiting the routine.
The SWI instruction is a non-maskable instruction that causes an
interrupt regardless of the state of the interrupt mask (I bit) in the
condition code register.
A software interrupt pushes PC onto the stack. A software interrupt does
not push PC – 1, as a hardware interrupt does.
The flags in the interrupt status registers identify maskable interrupt
sources.
status register flags that they set. The interrupt status registers can be
useful for debugging.
Table 7-4
System Integration Module (SIM)
summarizes the interrupt sources and the interrupt
System Integration Module (SIM)
Data Sheet
101

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