mc68hc908bd48 Freescale Semiconductor, Inc, mc68hc908bd48 Datasheet - Page 157

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mc68hc908bd48

Manufacturer Part Number
mc68hc908bd48
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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12.4.5 Accuracy and Precision
12.5 Interrupts
12.6 Low-Power Modes
12.6.1 Wait Mode
12.6.2 Stop Mode
12.7 I/O Signals
MC68HC908BD48
Freescale Semiconductor
Rev. 2.1
The conversion process is monotonic and has no missing codes.
When the AIEN bit is set, the ADC module is capable of generating a
CPU interrupt after each ADC conversion. A CPU interrupt is generated
if the COCO bit is at logic 0. The COCO bit is not used as a conversion
complete flag when interrupts are enabled.
The following subsections describe the low-power modes.
The ADC continues normal operation during wait mode. Any enabled
CPU interrupt request from the ADC can bring the MCU out of wait
mode. If the ADC is not required to bring the MCU out of wait mode,
power down the ADC by setting the ADCH[4:0] bits in the ADC status
and control register to logic 1’s before executing the WAIT instruction.
The ADC module is inactive after the execution of a STOP instruction.
Any pending conversion is aborted. ADC conversions resume when the
MCU exits stop mode. Allow one conversion cycle to stabilize the analog
circuitry before attempting a new ADC conversion after exiting stop
mode.
The ADC module has 6 channels that are shared with I/O port C.
Analog-to-Digital Converter (ADC)
Analog-to-Digital Converter (ADC)
Data Sheet
157

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