mc68hc908bd48 Freescale Semiconductor, Inc, mc68hc908bd48 Datasheet - Page 119

• Manufacturer Part Number: mc68hc908bd48
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

9.4.2 Data Format
MC68HC908BD48
Freescale Semiconductor
—
Rev. 2.1
Alternatively, the host can send a RUN command, which executes an
RTI, and this can be used to send control to the address on the stack
pointer.
The COP module is disabled in monitor mode as long as V
to the IRQ or the RST pin. (See
(SIM)
Table 9-2
monitor mode.
Communication with the monitor ROM is in standard non-return-to-zero
(NRZ) mark/space data format. (See
Notes:
BREAK
1. If the high voltage (V
START
$A5
output. The COP is a mask option enabled or disabled by the COPD bit in the configuration
register.
BIT
Monitor
Modes
User
for more information on modes of operation.)
START
START
BIT
BIT
BIT 0
is a summary of the differences between user mode and
BIT 0
BIT 0
Figure 9-3. Sample Monitor Waveforms
BIT 1
Monitor ROM (MON)
Disabled
Enabled
COP
Figure 9-2. Monitor Data Format
BIT 1
BIT 1
TST
BIT 2
Table 9-2. Mode Differences
) is removed from the IRQ pin, the SIM asserts its COP enable
(1)
BIT 2
BIT 2
BIT 3
BIT 3
BIT 3
Vector
$FEFE
$FFFE
Reset
High
Section 7. System Integration Module
BIT 4
BIT 4
BIT 4
Figure 9-2
Functions
BIT 5
BIT 5
BIT 5
Vector
$FEFF
$FFFF
Reset
Low
BIT 6
BIT 6
BIT 6
and
BIT 7
BIT 7
BIT 7
Vector
$FEFC
$FFFC
High
SWI
Figure
Monitor ROM (MON)
STOP
STOP
STOP
BIT
BIT
BIT
TST
START
9-3.)
START
NEXT
NEXT
is applied
BIT
BIT
Data Sheet
Vector
$FFFD
$FEFD
Low
SWI
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