mc68hc908bd48 Freescale Semiconductor, Inc, mc68hc908bd48 Datasheet - Page 227

• Manufacturer Part Number: mc68hc908bd48
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

16.7 System Operation
MC68HC908BD48
Freescale Semiconductor
HVOCR
000
001
010
011
100
101
110
111
—
Negative 2µs
Negative 2µs
Negative 2µs
Negative 2µs
Negative 2µs
Negative 2µs
Negative 2µs
Negative 2µs
Pulse width
Rev. 2.1
Table 16-10. Free-Running HSYNC and VSYNC Options
HVOCR[2:0] — H&V Output Select Bits
This Sync Processor is designed to assist in determining the video mode
of incoming HSYNC and VSYNC of various frequencies and polarities,
and DPMS modes. In the DPMS standard, a no sync pulses definition
can be detected when the value of the Hsync Frequency Register (the
number of Hsync pulses) is less than one or when the VOF bit is set.
Since the Hsync Frequency Register is updated repeatedly in every
32.768ms, and a valid Vsync must have a frequency greater than
40.7Hz, a valid Vsync pulse will arrive within the 32.768ms window.
Therefore, the user should read the Hsync Frequency Register every
32.768ms to determine the presence of Hsync and/or Vsync pulses.
HSYNCO
These three bits select the frequencies of the internal generated
free-running sync pulses for output to HSYNCO and VSYNCO pins,
when the SOUT bit is set in the SPIOCR. Reset clears these bits,
setting a default horizontal frequency of 31.25kHz and a vertical
frequency of 60Hz, a video mode of 640×480.
Frequency
105.26kHz
31.25kHz
43.48kHz
48.78kHz
54.05kHz
60.61kHz
80.00kHz
90.91kHz
Sync Processor
Negative 192µs
Negative 138µs
Negative 123µs
Negative 111µs
Negative 99µs
Negative 75µs
Negative 66µs
Negative 57µs
Pulse width
VSYNCO
Frequency
59.98 Hz
84.92 Hz
60.00 Hz
84.98 Hz
75.01 Hz
74.98 Hz
84.96 Hz
85.02 Hz
640×480
640×480
1024×768
800×600
1024×768
1280×1024
1280×1024
1600×1200
Video Mode
Sync Processor
Data Sheet
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