mc68hc908bd48 Freescale Semiconductor, Inc, mc68hc908bd48 Datasheet - Page 258

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mc68hc908bd48

Manufacturer Part Number
mc68hc908bd48
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Computer Operating Properly (COP)
19.3 Functional Description
Data Sheet
258
INTERNAL RESET SOURCES
(COPRS FROM CONFIG1)
(COPD FROM CONFIG1)
RESET VECTOR FETCH
STOP INSTRUCTION
COPEN (FROM SIM)
NOTE:
COP RATE SEL
COPCTL WRITE
COPCTL WRITE
COP DISABLE
OSCXCLK
RESET
Figure 19-1
The COP counter is a free-running 6-bit counter preceded by a 12-bit
prescaler counter. If not cleared by software, the COP counter overflows
and generates an asynchronous reset after 2
OSCXCLK cycles, depending on the state of the COP rate select bit,
COPRS, in configuration register 1. With a 2
overflow option, a 24MHz crystal gives a COP timeout period of
10.922ms. Writing any value to location $FFFF before an overflow
occurs prevents a COP reset by clearing the COP counter and stages
12 through 5 of the prescaler.
Service the COP immediately after reset and before entering or after
exiting stop mode to guarantee the maximum time before the first COP
counter overflow.
Figure 19-1. COP Block Diagram
COP MODULE
COP CLOCK
12-BIT COP PRESCALER
Computer Operating Properly (COP)
shows the structure of the COP module.
COP COUNTER
6-BIT COP COUNTER
CLEAR
RESET STATUS REGISTER
18
18
MC68HC908BD48
– 2
RESET CIRCUIT
– 2
4
Freescale Semiconductor
4
OSCXCLK cycle
or 2
13
– 2
4
Rev. 2.1

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