ep1sgx25d Altera Corporation, ep1sgx25d Datasheet - Page 59

• Manufacturer Part Number: ep1sgx25d
• Description: Stratix Gx Device Family Data Sheet
• Manufacturer: Altera Corporation

Altera Corporation
August 2005
Figure 3–7. PLL & Channel Layout in EP1SGX40 Devices
Notes to
(1)
(2)
(3)
Corner PLLs do not support DPA.
Not all eight phases are used by the receiver channel or transmitter channel in
non-DPA mode.
The center PLLs can only clock 20 transceivers in either direction. Using Fast PLL2,
you can clock a total of 40 transceivers, 20 in each direction.
Figure
22 Rows
23 Rows
3–7:
1 Transmitter
1 Transmitter
1 Transmitter
1 Transmitter
1 Receiver
1 Receiver
1 Receiver
1 Receiver
INCLK0
INCLK1
CLKIN
CLKIN
Source-Synchronous Signaling With DPA
Stratix GX Device Handbook, Volume 1
PLL (1)
PLL (1)
PLL 1
PLL 2
Fast
Fast
8
8
Eight-Phase
Clock
Eight-Phase
Clock
Notes
(1), (2),
3–9
(3)