ep1sgx25d Altera Corporation, ep1sgx25d Datasheet - Page 20

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ep1sgx25d

Manufacturer Part Number
ep1sgx25d
Description
Stratix Gx Device Family Data Sheet
Manufacturer
Altera Corporation
Datasheet

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2–10
Stratix GX Device Handbook, Volume 1
Figure 2–5. Serializer
Transmit Buffer
The Stratix GX transceiver buffers support the 1.5-V pseudo current
mode logic (PCML) I/O standard at a rate up to 3.1875 Gbps, across up to
40 inches of FR4 trace, and across 2 connectors. Additional I/O standards,
LVDS, 3.3-V PCML, LVPECL, can be supported when AC coupled. The
common mode of the output driver is 750 mV.
The output buffer, as shown in
output driver and a programmable pre-emphasis circuit.
parallel clock
Low-speed
High-speed
serial clock
10
Figure
D7
D6
D5
D4
D3
D2
D1
D0
D8
D9
2–6, consists of a programmable
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Altera Corporation
Serial data
out (to output
buffer)
June 2006

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