ep3c120f780c8nes Altera Corporation, ep3c120f780c8nes Datasheet - Page 435

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ep3c120f780c8nes

Manufacturer Part Number
ep3c120f780c8nes
Description
Cyclone Iii Device Family
Manufacturer
Altera Corporation
Datasheet

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Cyclone III Device Datasheet: DC & Switching Characteristics
Altera Corporation-Preliminary
March 2007
Notes to
(1)
(2)
(3)
f
Device operation in Mbps
t
TCCS
Output jitter (peak to peak)
t
t
t
f
HSCLK
DUTY
RISE
FALL
LOCK
HSCLK
Table 1–31. Three-Resistor mini-LVDS Transmitter Timing Specification (2),
Table 1–32. Dedicated LVDS Transmitter Timing Specification
Pending silicon characterization.
Values for device speed grade -7 and -8 will be available after characterization.
Three-resistor mini-LVDS is only supported at output pin of Column I/O (Bank 3, 4, 7 and 8).
(input clock frequency)
(input clock frequency)
Table
Symbol
Symbol
1–31:
20–80%
80–20%
Modes
Modes
x10
x10
x10
x8
x7
x4
x2
x1
x8
x7
x4
x2
x1
x8
x7
x4
x2
x1
(2)
Min
10
10
10
10
10
10
,
Min
100
10
10
10
10
10
10
80
70
40
20
10
(1)
(5)
-6 Speed Grade
(Part 1 of 2)
-6 Speed Grade
Typ
(3)
Typ
(1)
(1)
Max
420
420
420
420
420
420
(3)
Cyclone III Handbook
155.5
155.5
155.5
155.5
155.5
155.5
Max
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Max
(4)
(1)
(1)
(1)
(1)
(1)
(1)
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
MHz
MHz
MHz
MHz
MHz
MHz
Unit
ms
ps
ps
ps
ps
%
MHz
MHz
MHz
MHz
MHz
MHz
Unit
1–25

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