ep3c120f780c8nes Altera Corporation, ep3c120f780c8nes Datasheet - Page 311

• Manufacturer Part Number: ep3c120f780c8nes
• Description: Cyclone Iii Device Family
• Manufacturer: Altera Corporation

Altera Corporation-Preliminary
March 2007
The chip-wide reset (DEV_CLRn) and chip-wide output enable (DEV_OE)
pins on Cyclone III devices do not affect JTAG boundary-scan or
programming operations. Toggling these pins does not affect JTAG
operations (other than the usual boundary-scan operation).
When designing a board for JTAG configuration of Cyclone III devices,
consider the dedicated configuration pins.
pins should be connected during JTAG configuration.
When programming a JTAG device chain, one JTAG-compatible header is
connected to several devices. The number of devices in the JTAG chain is
limited only by the drive capability of the download cable. When four or
more devices are connected in a JTAG chain, Altera recommends
buffering the TCK, TDI, and TMS pins with an on-board buffer.
JTAG-chain device programming is ideal when the system contains
multiple devices, or when testing your system using JTAG BST circuitry.
Figure 10–25
nCE
nCEO
MSEL[3..0]
nCONFIG
nSTATUS
CONF_DONE
DCLK
Table 10–15. Dedicated Configuration Pin Connections During JTAG
Configuration
Signal
shows a multi-device JTAG configuration.
On all Cyclone III devices in the chain,
by connecting it to ground, pulling it low via a resistor, or driving
it by some control circuitry. For devices that are also in
multi-device AS, AP, PS, or FPP configuration chains, the
pins should be connected to GND during JTAG configuration or
JTAG configured in the same order as the configuration chain.
On all Cyclone III devices in the chain,
or connected to the
These pins must not be left floating. These pins support
whichever non-JTAG configuration is used in production. If only
JTAG configuration is used, tie these pins to GND.
Driven high by connecting to V
driven high by some control circuitry.
Pull to V
devices in the same JTAG chain, each
pulled up to V
Pull to V
devices in the same JTAG chain, each
be pulled up to V
end of JTAG configuration indicates successful configuration.
Should not be left floating. Drive low or high, whichever is more
convenient on your board.
C C
C C
via a 10 KΩ resistor. When configuring multiple
via a 10 KΩ resistor. When configuring multiple
C C
C C
individually.
nCE
individually.
Cyclone III Device Handbook, Volume 1
of the next device.
Description
CC
Table 10–15
CONF_DONE
, pulling up via a resistor, or
nCE
nCEO
nSTATUS
CONF_DONE
should be driven low
JTAG Configuration
shows how these
can be left floating
going high at the
pin should be
pin should
nCE
10–75