ep3c120f780c8nes Altera Corporation, ep3c120f780c8nes Datasheet - Page 22
ep3c120f780c8nes
Manufacturer Part Number
ep3c120f780c8nes
Description
Cyclone Iii Device Family
Manufacturer
Altera Corporation
Datasheet
1.EP3C120F780C8NES.pdf
(582 pages)
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Cyclone III Device Family Overview
Figure 1–1. Cyclone III Device Architecture Overview
Note to
(1)
1–6
Cyclone III Device Handbook, Volume 1
Up to 3.8 M-bit of
M9K Embedded
Memory Blocks
Up to 535
Integrated OCT
User I/O With
EP3C5 and EP3C10 have only 2 PLLs
Figure
1–1:
f
LEs and LABs
The logic array block (LAB) consists of 16 logic elements (LEs) and a LAB-
wide control block. An LE is the smallest unit of logic in the Cyclone III
device architecture. Each LE has four inputs, a 4-input Look-Up-Table
(LUT), a register, and output logic. The 4-input LUT is a function
generator that can implement any function of four variables.
For more information, refer to the Logic Elements (LE) and Logic Array
Blocks (LAB) chapter in the Cyclone III Device Handbook.
Note (1)
Altera Corporation-Preliminary
Dynamically
Configurable PLLs
200-MHz
Memory
Interfaces
Staggered I/O Ring
Up to 119,088
LEs
Up to 288 Embedded
Multipliers for
High-Throughput
DSP
March 2007
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