dac1408d650 NXP Semiconductors, dac1408d650 Datasheet - Page 85

• Manufacturer Part Number: dac1408d650
• Description: Dual 14-bit Dac, Up To 650 Msps, 2? And 4? Interpolating With Jesd204a Interface
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 111.FLAG_CNT_MSB_LN1 register
Table 112.FLAG_CNT_LSB_LN2 register
Table 113.FLAG_CNT_MSB_LN2 register
Table 114.FLAG_CNT_LSB_LN3 register
Table 115.FLAG_CNT_MSB_LN3 register
Table 116.BER_LEVEL register (address 19h)
Table 117.INTR_ENA register (address 1Ah)
Table 118.CNTRL_FLAGCNT_LN01 register
Table 119.CNTRL_FLAGCNT_LN23 register
Table 120.MON_FLAGS_RESET register
Table 121.DBG_CNTRL register (address 1Eh)
Table 122.PAGE_ADDRESS register (address 1Fh)
Table 123.Page 6 register allocation map . . . . . . . . . . . .69
Table 124.LN0_CFG_0 register (address 00h)
Table 125.LN0_CFG_1 register (address 01h)
Table 126.LN0_CFG_2 register (address 02h)
Table 127.LN0_CFG_3 register (address 03h)
Table 128.LN0_CFG_4 register (address 04h)
Table 129.LN0_CFG_5 register (address 05h)
Table 130.LN0_CFG_6 register (address 06h)
Table 131.LN0_CFG_7 register (address 07h)
Table 132.LN0_CFG_8 register (address 08h)
Table 133.LN0_CFG_9 register (address 09h)
Table 134.LN0_CFG_10 register (address 0Ah)
Table 135.LN0_CFG_11 register (address 0Bh)
Table 136.LN0_CFG_12 register (address 0Ch)
DAC1408D650_1
Objective data sheet
(address 12h) bit description . . . . . . . . . . . . . .65
(address 13h) bit description . . . . . . . . . . . . . .65
(address 14h) bit description . . . . . . . . . . . . . .66
(address 15h) bit description . . . . . . . . . . . . . .66
(address 16h) bit description . . . . . . . . . . . . . .66
(address 17h) bit description . . . . . . . . . . . . . .66
bit description . . . . . . . . . . . . . . . . . . . . . . . . .66
bit description . . . . . . . . . . . . . . . . . . . . . . . . .66
(address 1Bh) bit description . . . . . . . . . . . . . .67
(address 1Ch) bit description . . . . . . . . . . . . . .67
(address 1Dh) bit description . . . . . . . . . . . . . .67
bit description . . . . . . . . . . . . . . . . . . . . . . . . .68
bit description . . . . . . . . . . . . . . . . . . . . . . . . .68
bit description . . . . . . . . . . . . . . . . . . . . . . . . .71
bit description . . . . . . . . . . . . . . . . . . . . . . . . .71
bit description . . . . . . . . . . . . . . . . . . . . . . . . .71
bit description . . . . . . . . . . . . . . . . . . . . . . . . .71
bit description . . . . . . . . . . . . . . . . . . . . . . . . .71
bit description . . . . . . . . . . . . . . . . . . . . . . . . .71
bit description . . . . . . . . . . . . . . . . . . . . . . . . .71
bit description . . . . . . . . . . . . . . . . . . . . . . . . .71
bit description . . . . . . . . . . . . . . . . . . . . . . . . .71
bit description . . . . . . . . . . . . . . . . . . . . . . . . .72
bit description . . . . . . . . . . . . . . . . . . . . . . . . .72
bit description . . . . . . . . . . . . . . . . . . . . . . . . .72
Rev. 01 — 26 May 2009
Dual 14-bit DAC, up to 650 Msps, 2 and 4 interpolating
Table 137.LN0_CFG_13 register (address 0Dh)
Table 138.LN1_CFG_0 register (address 10h)
Table 139.LN1_CFG_1 register (address 11h)
Table 140.LN1_CFG_2 register (address 12h)
Table 141.LN1_CFG_3 register (address 13h)
Table 142.LN1_CFG_4 register (address 14h)
Table 143.LN1_CFG_5 register (address 15h)
Table 144.LN1_CFG_6 register (address 16h)
Table 145.LN1_CFG_7 register (address 17h)
Table 146.LN1_CFG_8 register (address 18h)
Table 147.LN1_CFG_9 register (address 19h)
Table 148.LN1_CFG_10 register (address 1Ah)
Table 149.LN1_CFG_11 register (address 1Bh)
Table 150.LN1_CFG_12 register (address 1Ch)
Table 151.LN1_CFG_13 register (address 1Dh)
Table 152.PAGE_ADDRESS register (address 1Fh)
Table 153.Page 7 register allocation map . . . . . . . . . . . . 74
Table 154.LN2_CFG_0 register (address 00h)
Table 155.LN2_CFG_1 register (address 01h)
Table 156.LN2_CFG_2 register (address 02h)
Table 157.LN2_CFG_3 register (address 03h)
Table 158.LN2_CFG_4 register (address 04h)
Table 159.LN2_CFG_5 register (address 05h)
Table 160.LN2_CFG_6 register (address 06h)
Table 161.LN2_CFG_7 register (address 07h)
Table 162.LN2_CFG_8 register (address 08h)
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 72
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 72
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 72
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 72
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 72
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 72
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 72
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 72
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 73
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 73
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 73
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 73
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 73
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 73
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 73
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 73
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 73
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 76
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 76
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 76
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 76
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 76
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 76
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 76
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 76
DAC1408D650
© NXP B.V. 2009. All rights reserved.
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