dac1408d650 NXP Semiconductors, dac1408d650 Datasheet - Page 37
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dac1408d650
Manufacturer Part Number
dac1408d650
Description
Dual 14-bit Dac, Up To 650 Msps, 2? And 4? Interpolating With Jesd204a Interface
Manufacturer
NXP Semiconductors
Datasheet
1.DAC1408D650.pdf
(88 pages)
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NXP Semiconductors
DAC1408D650_1
Objective data sheet
10.15.2.2 Page 0 bit definition detailed description
Please refer to
values emphasized in bold are the default values.
Table 19.
Default settings are shown highlighted.
Bit
7
6
3
2
1
0
Symbol
SPI_3W
SPI_RST
INTERLEAVED_MODE R/W
DF
PD_ALL
GAP_PD
COMMON register (address 00h) bit description
Table 18
Rev. 01 — 26 May 2009
for a register overview for page 0. In the following tables, all the
Dual 14-bit DAC, up to 650 Msps, 2 and 4 interpolating
Access Value Description
R/W
R/W
R/W
R/W
R/W
0
1
0
1
0
1
0
1
0
1
0
1
serial interface bus type
serial interface reset
state
data format
power-down
internal bandgap power-down
4 wire SPI
3 wire SPI
no reset
performs a reset on all registers except 0x00
disabled
enabled
unsigned format
signed (two’s compliment) format
no action
all circuits (digital and analog) are switched
off
no action
internal bandgap references are switched off
DAC1408D650
© NXP B.V. 2009. All rights reserved.
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