pi7c8154a Pericom Semiconductor Corporation, pi7c8154a Datasheet - Page 19

• Manufacturer Part Number: pi7c8154a
• Description: 2-port Pci-to-pci Bridge
• Manufacturer: Pericom Semiconductor Corporation

1.2.7
1.2.8
1.2.9
1.3
GENERAL PURPOSE I/O INTERFACE SIGNALS
JTAG BOUNDARY SCAN SIGNALS
POWER AND GROUND
PIN LIST
EE_EN#
Name
GPIO[3:0]
Name
TCK
TMS
TDO
TDI
TRST#
Name
VDD
VSS
LOCATION
BALL
A1
A3
A5
PIN NAME
VSS
S_AD[30]
VSS
AC22
Pin #
K2, K3, L4, L1
Pin #
N20
P21
P22
P23
N23
Pin #
A2, B1, B6, B20, B23, D5,
D6, D10, D14, D15, D18,
E22, H4, H20, J1, J3, J21,
M4, M20, N4, R1, R23, T1,
T4, T20, W3, Y6, Y10, Y14,
Y18, Y22, AB1, AB19,
AB23, AC2, AC3, AC8,
AC12, AC16
A1, A5, A12, A16, B2, B21,
B22, C7, D8, D12, D16,
D23, F4, F20, G23, H3, J2,
K4, K20, L20, N2, P4, P20,
T2, U21, V4, V20, Y8, Y9,
Y12, Y16, AA2, AA22,
AB2, AB22, AC1, AC4,
AC13, AC17, AC20, AC23
Page 19 of 112
TYPE
TS
P
P
Type
Type
Type
TS
O
P
P
I
I
I
I
I
LOCATION
EEPROM Enable: Set to LOW to enable
EEPROM interface
Description
General Purpose I/O Data Pins: The 4 general-
purpose signals are programmable as either input-
only or bi-directional signals by writing the GPIO
output enable control register in the configuration
space.
Description
Test Clock. Used to clock state information and
data into and out of the bridge during boundary
scan.
Test Mode Select. Used to control the state of the
Test Access Port controller.
Test Data Output. Used as the serial output for the
test instructions and data from the test logic.
Test Data Input. Serial input for the JTAG
instructions and test data.
Test Reset. Active LOW signal to reset the Test
Access Port (TAP) controller into an initialized
state.
Description
Power: +3.3V Digital power.
Ground: Digital ground.
BALL
A2
A4
A6
VDD
S_AD[27]
PIN NAME
S_AD[23]
ASYNCHRONOUS 2-PORT
JULY 2004 REVISION 1.00
PCI-to-PCI BRIDGE
Advance Information
TYPE
PI7C8154A
TS
TS
P