mt46h8m16lfcf-75-it Micron Semiconductor Products, mt46h8m16lfcf-75-it Datasheet - Page 74
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mt46h8m16lfcf-75-it
Manufacturer Part Number
mt46h8m16lfcf-75-it
Description
128mb Mobile Ddr Sdram Mt46h4m32lfb5-6
Manufacturer
Micron Semiconductor Products
Datasheet
1.MT46H8M16LFCF-75-IT.pdf
(84 pages)
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Figure 44:
PDF: 09005aef8331b3e9 / Source: 09005aef8331b3ce
ddr_mobile_sdram_cmd_op_timing_dia_fr5.08__3.fm - Rev. B 06/08 EN
Case 2:
Case 1:
Command
BA0, BA1
Address
t
t
AC (MAX) and
AC (MIN) and
DQS
DQS
DQ
DQ
CK#
CKE
A10
DM
CK
5
1
1
Bank Read – Without Auto Precharge
t
t
IS
IS
NOP
T0
Notes:
t
t
DQSCK (MIN)
DQSCK (MAX)
t
t
6
IH
IH
1. D
2. BL = 4 in the case shown.
3. Disable auto precharge.
4. Bank x at T5 is “Don’t Care” if A10 is HIGH at T5.
5. PRE = PRECHARGE.
6. NOP commands are shown for ease of illustration; other commands may be valid at these
7. The PRECHARGE command can only be applied at T5 if
8. Refer to Figure 28 on page 57 and Figure 29 on page 58 for DQS and DQ timing details.
t
Bank x
ACTIVE
IS
t
IS
Row
Row
T1
times.
t
IH
t
OUT
IH
t
CK
n = data out from column n.
t
t
t
RCD
RAS
RC
NOP
7
T2
6
t
CH
t
CL
Bank x
t
t
READ
Note 3
IS
LZ (MIN)
Col n
T3
2
t
IH
74
CL = 2
t
RPRE
t
t
AC (MIN)
LZ (MIN)
NOP
T4
5
t
AC (MAX)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
D
t
128Mb: x16, x32 Mobile DDR SDRAM
OUT
RPRE
n
t
DQSCK (MIN)
One bank
All banks
Bank x
D
n + 1
PRE
OUT
T5
D
t
OUT
DQSCK (MAX)
n
7
4
D
n + 2
T5n
OUT
D
n + 1
OUT
t
RAS (MIN) is met.
D
n + 3
NOP
t
OUT
T6
RPST
D
n + 2
OUT
Don’t Care
6
t
RP
T6n
t
HZ (MAX)
©2007 Micron Technology, Inc. All rights reserved.
t
D
n + 3
RPST
OUT
Timing Diagrams
NOP
T7
6
Transitioning Data
Preliminary
ACTIVE
Bank x
Row
Row
T8
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