mt46h8m16lfcf-75-it Micron Semiconductor Products, mt46h8m16lfcf-75-it Datasheet - Page 42

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mt46h8m16lfcf-75-it

Manufacturer Part Number
mt46h8m16lfcf-75-it
Description
128mb Mobile Ddr Sdram Mt46h4m32lfb5-6
Manufacturer
Micron Semiconductor Products
Datasheet
Burst Length (BL)
Burst Type
PDF: 09005aef8331b3e9 / Source: 09005aef8331b3ce
ddr_mobile_sdram_cmd_op_timing_dia_fr5.08__3.fm - Rev. B 06/08 EN
Read and write accesses to the Mobile DDR SDRAM are burst oriented, with the burst
length (BL) being programmable. The BL determines the maximum number of column
locations that can be accessed for a given READ or WRITE command. Burst lengths of 2,
4, 8, or 16 locations are available for both sequential and interleaved burst types.
When a READ or WRITE command is issued, a block of columns equal to the BL is effec-
tively selected. All accesses for that burst take place within this block, meaning that the
burst will wrap when a boundary is reached. The block is uniquely selected by A1–Ai
when BL = 2, by A2–Ai when BL = 4, by A3–Ai when BL = 8, and by A4–Ai when BL = 16,
where Ai is the most significant column address bit for a given configuration. The
remaining (least significant) address bits are used to specify the starting location within
the block. The programmed BL applies to both READ and WRITE bursts.
Accesses within a given burst may be programmed to be either sequential or interleaved
via the standard mode register.
The ordering of accesses within a burst is determined by the burst length, the burst type,
and the starting column address. See Table 19 on page 43 for details.
42
Micron Technology, Inc., reserves the right to change products or specifications without notice.
128Mb: x16, x32 Mobile DDR SDRAM
©2007 Micron Technology, Inc. All rights reserved.
Operations
Preliminary

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