mt46h8m16lfcf-75-it Micron Semiconductor Products, mt46h8m16lfcf-75-it Datasheet - Page 69

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mt46h8m16lfcf-75-it

Manufacturer Part Number
mt46h8m16lfcf-75-it
Description
128mb Mobile Ddr Sdram Mt46h4m32lfb5-6
Manufacturer
Micron Semiconductor Products
Datasheet
Figure 40:
PDF: 09005aef8331b3e9 / Source: 09005aef8331b3ce
ddr_mobile_sdram_cmd_op_timing_dia_fr5.08__3.fm - Rev. B 06/08 EN
Command
Address
t
t
t
DQSS (NOM)
DQSS (MIN)
DQSS (MAX)
DQS
DQS
DQS
CK#
DM
DM
DM
DQ
DQ
DQ
CK
WRITE-to-PRECHARGE – Uninterrupting
Notes:
Bank a,
WRITE
Col b
T0
t
DQSS
t
DQSS
1. PRE = PRECHARGE.
2. D
3. An unterrupted burst 4 of is shown.
4. A10 is LOW with the WRITE command (auto precharge is disabled).
5.
6. The PRECHARGE and WRITE commands are to the same device. However, the PRECHARGE
t
DQSS
t
and WRITE commands can be to different devices; in this case,
PRECHARGE command can be applied earlier.
D
WR is referenced from the first positive CK edge after the last data-in pair.
b
IN
IN
NOP
D
T1
b = data-in for column b.
b
IN
2
b+1
D
D
b
IN
IN
T1n
b+1
D
IN
b+1
b+2
D
D
IN
IN
NOP
b+2
T2
D
IN
b+3
b+2
D
D
IN
IN
T2n
b+3
D
IN
b+3
D
69
IN
T3
NOP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
128Mb: x16, x32 Mobile DDR SDRAM
t
NOP
WR
T4
Don’t Care
(a or all)
T5
PRE
Bank
t
1
WR is not required and the
©2007 Micron Technology, Inc. All rights reserved.
Timing Diagrams
Transitioning Data
T6
NOP
Preliminary

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