mt46h8m16lfcf-75-it Micron Semiconductor Products, mt46h8m16lfcf-75-it Datasheet - Page 20
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mt46h8m16lfcf-75-it
Manufacturer Part Number
mt46h8m16lfcf-75-it
Description
128mb Mobile Ddr Sdram Mt46h4m32lfb5-6
Manufacturer
Micron Semiconductor Products
Datasheet
1.MT46H8M16LFCF-75-IT.pdf
(84 pages)
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Table 10:
PDF: 09005aef8331b3e9 / Source: 09005aef8331b3ce
128mb_mobile_ddr_sdram_t35m__2.fm - Rev. B 06/08 EN
Parameter
Access window of DQs
from CK/CK#
Clock cycle time
CK high-level width
CK low-level width
CKE minimum pulse width (high
and low)
Auto precharge write recovery +
precharge time
DQ and DM input hold time
relative to DQS (fast slew rate)
DQ and DM input hold time
relative to DQS (slow slew rate)
DQ and DM input setup time
relative to DQS (fast slew rate)
DQ and DM input setup time
relative to DQS (slow slew rate)
DQ and DM input pulse width (for
each input)
Access window of DQS
from CK/CK#
DQS input high pulse width
DQS input low pulse width
DQS–DQ skew, DQS to last DQ
valid, per group, per access
WRITE command to first DQS
latching transition
DQS falling edge from CK rising –
hold time
DQS falling edge to CK rising –
setup time
Data valid output window (DVW)
Half-clock period
Data-out High-Z window
from CK/CK#
Data-out Low-Z window from CK/
CK#
Address and control input hold
time (fast slew rate)
Address and control input hold
time (slow slew rate)
Electrical Characteristics and Recommended AC Operating Conditions
Notes: 1–7 apply to all the parameters in this table; V
CL = 3
CL = 2
CL = 3
CL = 2
CL = 3
CL = 2
CL = 3
CL = 2
Symbol
t
t
t
DQSCK
DQSCK
t
t
t
t
t
t
t
t
DQSQ
DQSH
AC(3)
AC(2)
CK(3)
CK(2)
t
t
DIPW
DQSL
DQSS
t
t
t
t
t
t
t
DAL
DSH
t
t
CKE
t
t
t
DH
DH
DSS
n/a
t
DS
DS
CH
HP
HZ
IH
IH
CL
LZ
F
S
f
s
f
s
Min
0.45
0.45
0.48
0.58
0.48
0.58
0.75
t
t
2.0
2.0
1.8
2.0
2.0
0.4
0.4
0.2
0.2
QH -
t
1.0
0.9
1.1
CH,
12
CL
5
1
–
–
–
–
-5
t
DQSQ
Max
0.55
0.55
1.25
5.0
6.5
5.0
6.5
0.6
0.6
0.4
5.0
6.5
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
20
Min
0.45
0.45
0.54
0.64
0.54
0.64
0.75
t
t
t
2.0
2.0
5.4
1.9
2.0
2.0
0.4
0.4
0.2
0.2
QH -
CH,
1.0
1.0
1.2
12
CL
1
–
–
–
–
DD
-54
t
/V
DQSQ
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Max
128Mb: x16, x32 Mobile DDR SDRAM
0.55
0.55
0.45
1.25
DD
5.0
6.5
5.0
6.5
0.6
0.6
5.0
6.5
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Q = 1.70–1.95V
Min
0.45
0.45
t
0.75
t
2.0
2.0
0.6
0.7
0.6
0.7
2.1
2.0
2.0
0.4
0.4
0.2
0.2
QH -
CH,
t
1.0
1.1
1.3
12
CL
6
1
–
–
–
–
-6
t
DQSQ
Max
0.55
0.55
1.25
5.0
6.5
5.0
6.5
0.6
0.6
0.5
5.5
6.5
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Electrical Specifications
Min
0.45
0.45
0.75
t
t
©2007 Micron Technology, Inc. All rights reserved.
2.0
7.5
0.9
0.9
1.8
0.4
0.4
0.2
QH -
t
1.0
1.3
2.0
0.8
0.8
2.0
2.0
0.2
CH,
1.5
12
CL
1
–
–
–
–
-75
t
DQSQ
Max
0.55
0.55
1.25
0.6
0.6
6.0
6.0
6.5
6.0
6.5
0.6
6.5
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Unit Notes
t
t
t
t
t
t
t
t
ns
ns
CK
CK
CK
ns
ns
ns
ns
ns
ns
ns
CK
CK
ns
CK
CK
CK
ns
ns
ns
ns
ns
ns
ns
Preliminary
–
15, 16
11, 17
9, 10,
9, 10,
9, 13
11
11
12
13
14
15
8
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