st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 234

• Manufacturer Part Number: st7pmc2s6
• Description: 8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
• Manufacturer: STMicroelectronics

On-chip peripherals
10.6.8
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PWM manager
The PWM manager controls the motor via the six output channels in voltage mode or
current mode depending on the V0C1 bit in the MCRA register. A block diagram of this part
is given in
Voltage mode
In voltage mode (V0C1 bit = ‘0’), the PWM signal which is applied to the switches is
generated by the 12-bit PWM generator compare U.
Its duty cycle is programmed by software (refer to the PWM Generator section) as required
by the application (speed regulation for example).
The current comparator is used for safety purposes as a current limitation. For this feature,
the detected current must be present on the MCCFI pin and the current limitation must be
present on pin MCCREF. This current limitation is fixed by a voltage reference depending on
the maximum current acceptable for the motor. This current limitation is generated with the
V
external reference voltage ( 5V). The external components are adjusted by the user
depending on the application needs. In voltage mode, it is mandatory to set a current
limitation. As this limitation is set for safety purposes, an interrupt can be generated when
the motor current feedback reaches the current limitation in voltage mode. This is the
current limitation interrupt and it is enabled by setting the corresponding CLM bit in the
MIMR register. This is useful in voltage mode for security purposes.
The PWM signal is directed to the channel manager that connects it to the programmed
outputs (see
Over current handling in voltage mode
When the current limitation interrupt is enabled by setting the CLIM bit in the MIMR register
(available only in voltage mode), the OCV bit in MCRB register determines the effect of this
interrupt on the MCOx outputs as shown in
Table 101. OCV bit effect
1. Only this functionality (CLIM = CLI = OCV = 1) is valid when the three PWM channels are enabled (PCN
For safety purposes, it can be necessary to put all MCOx outputs in reset state (high
impedance, high state or low state depending on the setting made by the option byte) on a
current limitation interrupt. This is the purpose of the OCV bit. When a current limitation
interrupt occurs, if the OCV bit is reset, the effect on the MCOx outputs is only to put the
PWM signal OFF on the concerned outputs. If the OCV bit is set, when the current limitation
interrupt occurs, all the MCOx outputs are put in reset state.
CLIM bit
DD
bit = 1 in the MDTG register). It can also be used as an over-current protection for three-phase PWM
application (only if voltage mode is selected).
0
0
1
1
1
voltage by means of an external resistor divider but can also be adjusted with an
Figure
CLI bit
Figure
0
1
0
1
1
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
107.
107).
OCV bit
x
x
x
0
1
All MCOx outputs are put in reset state (MOE reset)
PWM is put OFF on current loop effect
PWM is put OFF on current loop effect
Table
Normal running mode
Normal running mode
Output effect
101.
(1)
Interrupt
Yes
Yes
No
No
No