st7pmc2s6 STMicroelectronics, st7pmc2s6 Datasheet - Page 168

• Manufacturer Part Number: st7pmc2s6
• Description: 8-bit Mcu For Automotive With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, 5 Timers, Spi, Linsci?
• Manufacturer: STMicroelectronics

On-chip peripherals
Note:
168/371
Clock deviation causes
The causes which contribute to the total deviation are:
The transmitter can be either a master or a slave (in case of a slave listening to the
response of another slave).
All the deviations of the system should be added and compared to the LINSCI clock
tolerance:
D
Figure 72. Bit sampling in reception mode
Error due to LIN synch measurement
The LIN synch field is measured over eight bit times.
This measurement is performed using a counter clocked by the CPU clock. The edge
detections are performed using the CPU clock cycle.
This leads to a precision of 2 CPU clock cycles for the measurement which lasts 16*8*LDIV
clock cycles.
Consequently, this error (D
2/(128*LDIV
LDIV
rate, taking into account the maximum deviation of 15%.
TRA
RDI line
Sample
clock
D
D
D
D
the reception of one complete LIN message assuming that the deviation has been
compensated at the beginning of the message.
D
MIN
+ D
TRA
MEAS
QUANT
REC
TCL
corresponds to the minimum LIN prescaler content, leading to the maximum baud
MEAS
: deviation due to the transmission line (generally due to the transceivers)
: deviation due to transmitter error.
: deviation of the local oscillator of the receiver: This deviation can occur during
: error due to the LIN synch measurement performed by the receiver.
MIN
: error due to the baud rate quantization of the receiver.
1
+D
).
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
QUANT
2
3
+ D
MEAS
7/16
4
REC
) is:
5
+ D
TCL
6
< 3.75%
7
Sampled values
One bit time
8
9
10
11
12
6/16
13
7/16
14
15
16