si4330 Silicon Laboratories, si4330 Datasheet - Page 84
si4330
Manufacturer Part Number
si4330
Description
Si4330 Ism Receiver
Manufacturer
Silicon Laboratories
Datasheet
1.SI4330.pdf
(142 pages)
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Register 0Dh. GPIO Configuration 2
Si4330
Reset value = 00000000
84
Name
Type
Bit
7:6
4:0
Bit
5
gpiodrv2[1:0] GPIO Driving Capability Setting.
gpio2[4:0]
Name
pup2
D7
gpiodrv2[1:0]
R/W
Pullup Resistor Enable on GPIO2.
When set to 1 the a 200 kresistor is connected internally between VDD and the pin if the
GPIO is configured as a digital input.
GPIO2 pin Function Select.
00000:
00001:
00010:
00011:
00100:
00101:
00110:
00111:
01000:
01001:
01010:
01011:
01100:
01101:
01110:
01111:
10000:
10001:
10010:
10011:
10100:
10101:
10110:
10111:
11000:
11001:
11010:
11011:
11100:
11101:
else :
D6
Microcontroller Clock
Wake-Up Timer: 1 when WUT has expired (output)
Low Battery Detect: 1 when battery is below threshold setting (output)
Direct Digital Input
External Interrupt, falling edge (input)
External Interrupt, rising edge (input)
External Interrupt, state change (input)
ADC Analog Input
Reserved (Analog Test N Input)
Reserved (Analog Test P Input)
Direct Digital Output
Reserved (Digital Test Output)
Reserved (Analog Test N Output)
Reserved (Analog Test P Output)
Reference Voltage (output)
RX Data CLK output to be used in conjunction with RX Data pin (output)
Reserved
External Retransmission Request (input)
Reserved
Reserved
RX Data (output)
RX State (output)
RX FIFO Almost Full (output)
Antenna 1 Switch used for antenna diversity (output)
Antenna 2 Switch used for antenna diversity (output)
Valid Preamble Detected (output)
Invalid Preamble Detected (output)
Sync Word Detected (output)
Clear Channel Assessment (output)
VDD
GND
pup2
R/W
D5
Preliminary Rev 0.2
D4
Function
D3
gpio2[4:0]
R/W
D2
D1
D0