si4330 Silicon Laboratories, si4330 Datasheet - Page 138

• Manufacturer Part Number: si4330
• Description: Si4330 Ism Receiver
• Manufacturer: Silicon Laboratories

Si4330
13. Pin Descriptions: Si4330
138
PKG
Pin
10
12
13
20
21
22
23
24
25
26
11
1
2
3
4
5
6
7
8
9
PADDLE_GND
Pin Name
VDD_DIG
VDD_RF
GPIO_0
GPIO_1
GPIO_2
VR_IF
XOUT
SCLK
nSEL
nIRQ
SDO
VDR
SDN
RXp
RXn
SDI
XIN
NC
NC
NC
GND
VDD
VDD
I/O
I/O
I/O
I/O
—
—
—
O
O
O
O
O
I
I
I
I
I
I
I
+1.8 to +3.6 V supply voltage input to all analog +1.7 V regulators. The recommended V
is +3.3 V.
No Connect.
Differential RF input pins of the LNA. See application schematic for example matching network.
Regulated Output Voltage of the IF 1.7 V Regulator. A 1 µF decoupling capacitor is required.
No Connect.
General Purpose Digital I/O that may be configured through the registers to perform various functions
including: Microcontroller Clock Output, FIFO status, POR, Wake-Up timer, Low Battery Detect, Antenna
Switch, AntDiversity control, etc. See the SPI GPIO Configuration Registers, Address 0Bh, 0Ch, and 0Dh
for more information.
Regulated Output Voltage of the Digital 1.7 V Regulator. A 1 µF decoupling capacito is required.
No Connect.
+1.8 to +3.6 V supply voltage input to the Digital +1.7 V Regulator. The recommended V
is +3.3 V.
0–V
Serial Data input. 0–V
bus.
Serial Clock input. 0–V
serial data bus. Data is clocked into the Si4330 on positive edge transitions.
Serial Interface Select input. 0– V
line serial data bus. The signal is also used to signify burst read/write mode.
General Microcontroller Interrupt Status output. When the Si4330 exhibits anyone of the Interrupt Events
the nIRQ pin will be set low=0. Please see the Control Logic registers section for more information on the
Interrupt Events. The Microcontroller can then determine the state of the interrupt by reading a corre-
sponding SPI Interrupt Status Registers, Address 03h and 04h.
Crystal Oscillator Output. Connect to an external 30 MHz crystal or leave floating if driving the Xin pin with
an external signal source.
Crystal Oscillator Input. Connect to an external 30 MHz crystal or to an external source. If using an exter-
nal clock source with no crystal, dc coupling with a nominal 0.8 VDC level is recommended with a mini-
mum ac amplitude of 700 mVpp.
Shutdown input pin. 0–V
SDN =1 the chip will be completely shutdown and the contents of the registers will be lost.
The exposed metal paddle on the bottom of the Si4330 supplies the RF and circuit ground(s) for the entire
chip. It is very important that a good solder connection is made between this exposed metal paddle and
the ground plane of the PCB underlying the Si4330.
DD
V digital output that provides a serial readback function of the internal control registers.
VDD_RF
VR_IF
Paddle
RXp
RXn
Metal
NC
DD
Preliminary Rev 0.2
DD
DD
1
2
3
4
5
V digital input. This pin provides the serial data stream for the 4-line serial data
V digital input. This pin provides the serial data clock function for the 4-line
V digital input. SDN should be = 0 in all modes except Shutdown mode. When
20
6
19 18 17
7
8
DD
9
V digital input. This pin provides the Select/Enable function for the 4-
10
16
15
14
13
12
11
Description
SCLK
SDI
SDO
VDD_DIG
NC
DD
DD
supply voltage
supply voltage