si4330 Silicon Laboratories, si4330 Datasheet - Page 78

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si4330

Manufacturer Part Number
si4330
Description
Si4330 Ism Receiver
Manufacturer
Silicon Laboratories
Datasheet

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Register 07h. Operating Mode and Function Control 1
Si4330
Reset value = 00000001
78
Name
Type
Bit
Bit
7
6
5
4
3
2
1
0
Reserved
swres
x32ksel
R/W
Name
D7
swres
enlbd
enwt
pllon
rxon
xton
Software Register Reset Bit.
This bit may be used to reset all registers simultaneously to a DEFAULT state, without the
need for sequentially writing to each individual register. The RESET is accomplished by
setting swres = 1. This bit will be automatically cleared.
Enable Low Battery Detect.
When this bit is set to 1 the Low Battery Detector circuit and threshold comparison will be
enabled.
Enable Wake-Up-Timer.
Enabled when enwt = 1. If the Wake-up-Timer function is enabled it will operate in any
mode and notify the microcontroller through the GPIO interrupt when the timer expires.
32,768 kHz Crystal Oscillator Select.
0:
1:
Reserved.
RX on in Manual Receiver Mode.
Automatically cleared if Multiple Packets config. is disabled and a valid packet received.
TUNE Mode (PLL is ON).
When pllon = 1 the PLL will remain enabled in Idle State. This will for faster turn-around
time at the cost of increased current consumption in Idle State.
READY Mode (Xtal is ON).
enlbd
R/W
D6
RC oscillator
32 kHz crystal
enwt
R/W
D5
Preliminary Rev 0.2
x32ksel
R/W
D4
Reserved
Function
R/W
D3
rxon
R/W
D2
pllon
R/W
D1
xton
R/W
D0

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