si4330 Silicon Laboratories, si4330 Datasheet - Page 129
si4330
Manufacturer Part Number
si4330
Description
Si4330 Ism Receiver
Manufacturer
Silicon Laboratories
Datasheet
1.SI4330.pdf
(142 pages)
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Register 69h. AGC Override 1
Register 6Ah. AGC Override 2
Reset value = 00100000
Reset value = 10011101
Name
Name
Type
Type
Bit
Bit
7:6
3:0
5:2
1:0
Bit
Bit
5
4
7
6
lnacomp[3:0] LNA Gain Compensation.
agcovpm
pgath[1:0]
Reserved
agcovpm
pga[3:0]
agcslow
lnagain
R/W
Name
agcen
Name
D7
D7
Reserved
R
agcslow
Reserved.
Automatic Gain Control Enable.
When this bit is set then the result of the control can be read out from bits [4:0], otherwise
the gain can be controlled manually by writing into bits [4:0].
LNA Gain Select.
0 – min. gain = 5 dB
PGA Gain Override Value.
000:
001:
010:
...
101:
If set, AGC will ignore the Preamble Detection.
AGC Slow Gain Increase Enable.
When this bit is set then the AGC loop will slow down the gain increase in the receiver.
The speed of the gain reduction is not affected.
This bit is used for smoothing RSSI value when LNA gain is switched.
Window Comparator Reference Voltage Adjust in the PGA.
R/W
D6
D6
0 dB
3 dB
6 dB
24 dB max.
agcen
R/W
D5
D5
Preliminary Rev 0.2
lnagain
1 – max. gain = 25 dB
R/W
D4
D4
lnacomp[3:0]
R/W
Function
Function
D3
D3
D2
D2
pga[3:0]
R/W
D1
D1
pgath[1:0]
Si4330
R/W
D0
D0
129