si5315 Silicon Laboratories, si5315 Datasheet - Page 37

• Manufacturer Part Number: si5315
• Description: Synchronous Ethernet/telecom Jitter Attenuating Clock Multiplier
• Manufacturer: Silicon Laboratories

5. High-Speed I/O
5.1. Input Clock Buffers
The Si5315 provides differential inputs for the CKINn clock inputs. These inputs are internally biased to a common
mode voltage [see Table 2, “DC Characteristics”] and can be driven by either a single-ended or differential source.
Figure 10 through Figure 13 show typical interface circuits for LVPECL, CML, LVDS, or CMOS input clocks. Note
that the jitter generation improves for higher levels on CKINn (within the limits in Table 3, “AC Characteristics”).
AC coupling the input clocks is recommended because it removes any issue with common mode input voltages.
However, either ac or dc coupling is acceptable. Figures 10 and 11 show various examples of different input
termination arrangements. Unused inputs can be left unconnected.
Driver
LVPECL
Driver
Figure 11. Single-Ended LVPECL Termination
Figure 10. Differential LVPECL Termination
130
82
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
130
82
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
3.3 V
3.3 V
130
82
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Preliminary Rev. 0.2
C
C
C
C
40 k
40 k
40 k
40 k
Si5315
Si5315


CKIN +
CKIN
CKIN +
CKIN
300
300
_
_


±
±
V
ICM
V
ICM
Si5315
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