si5315 Silicon Laboratories, si5315 Datasheet - Page 13
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si5315
Manufacturer Part Number
si5315
Description
Synchronous Ethernet/telecom Jitter Attenuating Clock Multiplier
Manufacturer
Silicon Laboratories
Datasheet
1.SI5315.pdf
(56 pages)
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Table 3. AC Characteristics (Continued)
(V
Output Clock Initial Phase Step
Output Clock Phase Slope
Holdover Frequency Historical
Averaging Time
Holdover Frequency Historical Delay
Time
Holdover Initial Frequency Error
Holdover Frequency Stability vs.
Power Supply
Holdover Frequency Deviation vs.
Temperature
Spurious Noise
Notes:
DD
1. Refers to Si5315A speed grade.
2. Refers to Si5315B speed grade.
3. Assumes N3 does not equal 1. IF N3 = 1, CKN
= 1.8 ±5%, 2.5 ±10%, or 3.3 V ±10%, T
Parameter
t
t
t
Symbol
SP
t
P_SLOPE
A
HISTAVG
HISTDEL
DH
DH
P_STEP
DH
= –40 to 85 ºC)
SPUR
FVD
FVT
DFI
Preliminary Rev. 0.2
DC
During clock switch CKIN >
stable CKIN selected until
External resonator stable
External Reference clock
(n > 1, n x f3 < 100 MHz)
External reference clock
External reference clock
= 50 µs.
Per GR-CORE-1244
CKINn selected until
During clock switch
Max spur @ n x f3
entering holdover
entering holdover
Test Condition
External crystal
External crystal
f3 > 128 kHz
f3 < 128 kHz
19.44 MHz
Min
Tracks external crystal
—
—
—
—
—
—
—
—
—
Tracks external
reference clock
Tracks external
reference clock
26.2
Typ
100
0.2
2.2
6.7
50
—
—
—
Si5315
Max
200
–75
0.5
61
50
—
—
—
—
10%
in V
Units
±ppb
±ppb
ppm/
µs/s
dBc
sec
ms
ps
ns
DD
13