spakdsp301vl100 Freescale Semiconductor, Inc, spakdsp301vl100 Datasheet - Page 24

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spakdsp301vl100

Manufacturer Part Number
spakdsp301vl100
Description
Dsp56301 24-bit Digital Signal Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Signals/Connections
1.11 Timers
The DSP56301 has three identical and independent timers. Each can use internal or external clocking, interrupt the
DSP56301
of internal events.
1-20
SCLK
PE2
TIO0
TIO1
TIO2
Signal Name
Signal Name
after a specified number of events (clocks), or signal an external device after counting a specific number
Input/Output
Input or Output
Input or Output
Input or Output
Input or Output
Type
Type
Table 1-14.
Input
Input
Input
Input
State During
State During
Reset
Reset
Serial Communication Interface (SCI) (Continued)
Table 1-15.
DSP56301 Technical Data, Rev. 10
Serial Clock
Provides the input or output clock used by the transmitter and/or the receiver.
Port E 2
The default configuration following reset is GPIO. For PE2, signal direction is
controlled through the SCI PRR. The signal can be configured as an SCI
signal SCLK through the SCI PCR.
This input is 5 V tolerant.
Timer 0 Schmitt-Trigger Input/Output
As an external event counter or in Measurement mode, TIO0 is input. In
Watchdog, Timer, or Pulse Modulation mode, TIO0 is output.
The default mode after reset is GPIO input. This can be changed to output or
configured as a Timer Input/Output through the Timer 0 Control/Status
Register (TCSR0).
This input is 5 V tolerant.
Timer 1 Schmitt-Trigger Input/Output
As an external event counter or in Measurement mode, TIO1 is input. In
Watchdog, Timer, or Pulse Modulation mode, TIO1 is output.
The default mode after reset is GPIO input. This can be changed to output or
configured as a Timer Input/Output through the Timer 1 Control/Status
Register (TCSR1).
This input is 5 V tolerant.
Timer 2 Schmitt-Trigger Input/Output
As an external event counter or in Measurement mode, TIO2 is input. In
Watchdog, Timer, or Pulse Modulation mode, TIO2 is output.
The default mode after reset is GPIO input. This can be changed to output or
configured as a Timer Input/Output through the Timer 2 Control/Status
Register (TCSR2).
This input is 5 V tolerant.
Triple Timer Signals
Signal Description
Signal Description
Freescale Semiconductor

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