LM3S5632 Luminary Micro, Inc, LM3S5632 Datasheet - Page 528
LM3S5632
Manufacturer Part Number
LM3S5632
Description
Lm3s5632 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S5632.pdf
(685 pages)
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Reset
Reset
Type
Type
Controller Area Network (CAN) Module
CAN Message 1 Interrupt Pending (CANMSG1INT)
CAN0 base: 0x4004.0000
Offset 0x140
Type RO, reset 0x0000.0000
528
Bit/Field
31:16
15:0
RO
RO
31
15
0
0
RO
RO
Register 34: CAN Message 1 Interrupt Pending (CANMSG1INT), offset 0x140
Register 35: CAN Message 2 Interrupt Pending (CANMSG2INT), offset 0x144
The CANMSG1INT and CANMSG2INT registers hold the IntPnd bits of the 32 message objects.
By reading these bits, the CPU can check which message object has an interrupt pending. The
IntPnd bit of a specific message object can be changed through two sources: (1) the CPU via the
CAN IFn Message Control (CANIFnMCTL) register, or (2) the message handler state machine
after the reception or transmission of a frame.
This field is also encoded in the CAN Interrupt (CANINT) register.
The CANMSG1INT register contains the IntPnd bit of the first 16 message objects in the message
RAM; the CANMSG2INT register contains the IntPnd bit of the second 16 message objects.
30
14
0
0
RO
RO
29
13
reserved
0
0
IntPnd
Name
RO
RO
28
12
0
0
RO
RO
27
11
0
0
Type
RO
RO
RO
RO
26
10
0
0
0x0000
RO
RO
Reset
25
0x00
0
9
0
Preliminary
RO
RO
24
0
8
0
reserved
IntPnd
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Interrupt Pending Bits
(of all message objects)
0: This message object is not the source of an interrupt.
1: This message object is the source of an interrupt.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RO
RO
19
0
3
0
RO
RO
18
0
2
0
RO
RO
17
0
1
0
June 02, 2008
RO
RO
16
0
0
0
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