LM3S5632 Luminary Micro, Inc, LM3S5632 Datasheet - Page 515

• Manufacturer Part Number: LM3S5632
• Description: Lm3s5632 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Reset
Reset
Type
Type
Read-Only CANIFnCMSK Register
CAN IF1 Command Mask (CANIF1CMSK)
CAN0 base: 0x4004.0000
Offset 0x024
Type R/W, reset 0x0000.0000
June 02, 2008
Bit/Field
31:8
RO
RO
7
6
5
4
3
31
15
0
0
RO
RO
Register 10: CAN IF1 Command Mask (CANIF1CMSK), offset 0x024
Register 11: CAN IF2 Command Mask (CANIF2CMSK), offset 0x084
The Command Mask registers specify the transfer direction and select which buffer registers are
the source or target of the data transfer.
30
14
0
0
RO
RO
29
13
ClrIntPnd
reserved
WRNRD
0
0
Control
Name
Mask
Arb
RO
RO
28
12
0
0
reserved
RO
RO
27
11
0
0
Type
RO
R
R
R
R
R
RO
RO
26
10
0
0
0x0000
RO
RO
Reset
25
0
9
0
0
0
0
0
0
Preliminary
RO
RO
24
0
8
0
reserved
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Write, Not Read
Transfer the message object address specified by the CAN Command
Request (CANIFnCRQ) register to the CAN message buffer registers
(CANIFnMSK1, CANIFnMSK2, CANIFnARB1, CANIFnARB2,
CANIFnCTL, CANIFnDA1, CANIFnDA2, CANIFnDB1, and
CANIFnDB2).
Access Mask Bits
0: Mask bits unchanged.
1: Transfer IDMask + Dir + MXtd of the message object into the
Interface registers.
Access Arbitration Bits
0: Arbitration bits unchanged.
1: Transfer ID + Dir + Xtd + MsgVal of the message object into the
Interface registers.
Access Control Bits
0: Control bits unchanged.
1: Transfer control bits into Interface registers.
Clear Interrupt Pending Bit
0: IntPnd bit in CANIFnMCTL register remains unchanged.
1: Clear IntPnd bit in the CANIFnMCTL register in the message object.
WRNRD
RO
23
R
0
7
0
Mask
RO
22
0
6
R
0
RO
Arb
21
R
0
5
0
Control
RO
20
R
0
4
0
ClrIntPnd
RO
19
R
0
3
0
LM3S5632 Microcontroller
NewDat
RO
18
R
0
2
0
DataA
RO
17
0
1
R
0
DataB
RO
16
R
0
0
0
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