LM3S5632 Luminary Micro, Inc, LM3S5632 Datasheet - Page 488

• Manufacturer Part Number: LM3S5632
• Description: Lm3s5632 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Reset
Reset
Type
Type
Inter-Integrated Circuit (I
I2C Slave Interrupt Clear (I2CSICR)
I2C Slave 0 base: 0x4002.0800
I2C Slave 1 base: 0x4002.1800
Offset 0x018
Type WO, reset 0x0000.0000
488
Bit/Field
31:3
RO
RO
2
1
0
31
15
0
0
RO
RO
Register 16: I
This register clears the raw interrupt. A read of this register returns no meaningful data.
30
14
0
0
RO
RO
STARTIC
29
13
reserved
0
0
STOPIC
DATAIC
Name
2
C) Interface
RO
RO
28
12
0
0
2
C Slave Interrupt Clear (I2CSICR), offset 0x018
RO
RO
27
11
0
0
Type
WO
WO
WO
RO
RO
RO
26
10
0
0
reserved
RO
RO
Reset
25
0x00
0
9
0
0
0
0
Preliminary
RO
RO
24
0
8
0
reserved
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Stop Condition Interrupt Clear
This bit controls the clearing of the raw interrupt for stop condition detect.
When set, it clears the STOPRIS interrupt bit; otherwise, it has no effect
on the STOPRIS bit value.
Start Condition Interrupt Clear
This bit controls the clearing of the raw interrupt for start condition detect.
When set, it clears the STARTRIS interrupt bit; otherwise, it has no effect
on the STARTRIS bit value.
Data Interrupt Clear
This bit controls the clearing of the raw interrupt for data received and
data requested. When set, it clears the DATARIS interrupt bit; otherwise,
it has no effect on the DATARIS bit value.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RO
RO
19
0
3
0
STOPIC
WO
RO
18
0
2
0
STARTIC
WO
RO
17
0
1
0
June 02, 2008
DATAIC
WO
RO
16
0
0
0