AN1769 Freescale Semiconductor / Motorola, AN1769 Datasheet - Page 31

• Manufacturer Part Number: AN1769
• Description: Designing a Minimal PowerPC System
• Manufacturer: Freescale Semiconductor / Motorola

MOTOROLA
Figure 17 shows two back-to-back accesses, one to the ÒslowÓ I/O space, and the second to the ÒfastÓ I/O
space.
3.7 Software
When writing software using this simple memory controller, be sure to consider the effects the restrictions
have placed on the environment. For example, because the Flash and I/O areas do not support burst transfers,
they cannot be made cacheable. If either the instruction or data cache is enabled on any PowerPC processor,
burst transfers will always occur unless the memory management unit (via BATs or PTEs) is used to mark
addresses as non-cacheable.
CLK
A_HIGH0
A_HIGH1
A_LOW29
A_LOW30
A_LOW31
TT0
TT1
TT2
TT3
TT4
TSIZ0
TSIZ1
TSIZ2
TBST_L
TS_L
AACK_L
TA_L
TEA_L
XCS_L0
XCS_L1
XOE_L
BWE_L0
BWE_L1
BWE_L2
BWE_L3
BWE_L4
BWE_L5
BWE_L6
BWE_L7
RST_L
T(CLK)
Freescale Semiconductor, Inc.
Figure 17. I/O ROMÑSingle-Beat Read/Write
For More Information On This Product,
Minimal PowerPC System Design
2u
Go to: www.freescale.com
3u
Time (Seconds)
4u
5u
6u
7u
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