LM3S1150-IQC50-A1 Luminary Micro, Inc., LM3S1150-IQC50-A1 Datasheet - Page 347

• Manufacturer Part Number: LM3S1150-IQC50-A1
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

I2C Master Interrupt Mask (I2CMIMR)
I2C Master 0 base: 0x4002.0000
I2C Master 1 base: 0x4002.1000
Offset 0x010
Type R/W, reset 0x0000.0000
June 14, 2007
Reset
Reset
Type
Type
Bit/Field
31:1
0
RO
RO
31
15
0
0
Register 5: I
This register controls whether a raw interrupt is promoted to a controller interrupt.
RO
RO
30
14
0
0
reserved
Name
IM
RO
RO
29
13
0
0
Luminary Micro Confidential-Advance Product Information
2
RO
RO
28
12
0
0
C Master Interrupt Mask (I2CMIMR), offset 0x010
RO
RO
Type
27
11
R/W
0
0
RO
RO
RO
26
10
0
0
Reset
0
0
RO
RO
25
0
9
0
reserved
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
This bit controls whether a raw interrupt is promoted to a controller
interrupt. If set, the interrupt is not masked and the interrupt is promoted;
otherwise, the interrupt is masked.
RO
RO
24
0
8
0
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
LM3S1150 Microcontroller
RO
RO
19
0
3
0
RO
RO
18
0
2
0
RO
RO
17
0
1
0
R/W
RO
16
IM
0
0
0
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