LM3S1150-IQC50-A1 Luminary Micro, Inc., LM3S1150-IQC50-A1 Datasheet - Page 109

no-image

LM3S1150-IQC50-A1

Manufacturer Part Number
LM3S1150-IQC50-A1
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
Software Reset Control 0 (SRCR0)
Base 0x400F.E000
Offset 0x040
Type R/W, reset 0x00000000
June 14, 2007
Reset
Reset
Type
Type
Bit/Field
31:21
19:7
5:4
2:0
20
6
3
RO
RO
31
15
0
0
Register 27: Software Reset Control 0 (SRCR0), offset 0x040
Writes to this register are masked by the bits in the Device Capabilities 1 (DC1) register.
RO
RO
30
14
0
0
reserved
reserved
reserved
reserved
Name
PWM
WDT
HIB
RO
RO
29
13
0
0
Luminary Micro Confidential-Advance Product Information
RO
RO
28
12
0
0
reserved
RO
RO
Type
27
11
R/W
R/W
R/W
0
0
RO
RO
RO
RO
reserved
RO
RO
26
10
0
0
Reset
0
0
0
0
0
0
0
RO
RO
25
0
9
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Reset control for PWM module.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Reset control for the Hibernation module.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Reset control for Watchdog unit.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
RO
RO
24
0
8
0
RO
RO
23
0
7
0
R/W
HIB
RO
22
0
6
0
RO
RO
21
0
5
0
reserved
PWM
R/W
RO
20
0
4
0
LM3S1150 Microcontroller
WDT
R/W
RO
19
0
3
0
RO
RO
18
0
2
0
reserved
reserved
RO
RO
17
0
1
0
RO
RO
16
0
0
0
109

Related parts for LM3S1150-IQC50-A1