LM3S1150-IQC50-A1 Luminary Micro, Inc., LM3S1150-IQC50-A1 Datasheet - Page 339

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LM3S1150-IQC50-A1

Manufacturer Part Number
LM3S1150-IQC50-A1
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
14.5
June 14, 2007
Offset
0x00C
0x004
0x008
0x010
0x014
0x018
Name
I2CSCSR
I2CSDR
I2CSIMR
I2CSRIS
I2CSMIS
I2CSICR
Register Descriptions (I
The remainder of this section lists and describes the I
address offset. See also “Register Descriptions (I2C Slave)” on page 352.
Luminary Micro Confidential-Advance Product Information
Type
R/W
R/W
WO
RO
RO
RO
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
Reset
2
C Master)
Description
I2C Slave Control/Status
I2C Slave Data
I2C Slave Interrupt Mask
I2C Slave Raw Interrupt Status
I2C Slave Masked Interrupt Status
I2C Slave Interrupt Clear
2
C master registers, in numerical order by
LM3S1150 Microcontroller
page
See
354
356
357
358
359
360
339

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