DSP56F803 Motorola Inc, DSP56F803 Datasheet - Page 45

• Manufacturer Part Number: DSP56F803
• Description: 16-bit Hybrid Controller
• Manufacturer: Motorola Inc

5.2 Electrical Design Considerations
Use the following list of considerations to assure correct operation:
56F803 Technical Data
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Provide a low-impedance path from the board power supply to each V
controller, and from the board ground to each V
The minimum bypass requirement is to place 0.1 F capacitors positioned as close as possible to
the package supply pins. The recommended bypass configuration is to place one bypass capacitor
on each of the V
provide better performance tolerances.
Ensure that capacitor leads and associated printed circuit traces that connect to the chip V
V
Bypass the V
grade capacitor such as a tantalum capacitor.
Because the controller’s output signals have fast rise and fall times, PCB trace lengths should be
minimal.
Consider all device loads as well as parasitic capacitance due to PCB traces when calculating
capacitance. This is especially critical in systems with higher capacitive loads that could create
higher transient currents in the V
Take special care to minimize noise levels on the VREF, V
Designs that utilize the TRST pin for JTAG port or OnCE module functionality (such as
development or debugging systems) should allow a means to assert TRST whenever RESET is
asserted, as well as a means to assert TRST independently of RESET. TRST must be asserted at
power up for proper operation. Designs that do not require debugging functionality, such as
consumer products, TRST should be tied low.
Because the Flash memory is programmed through the JTAG/OnCE port, designers should provide
an interface to this port to allow in-circuit Flash programming.
SS
(GND) pins are less than 0.5 inch per capacitor lead.
This device contains protective circuitry to guard
against damage due to high static voltage or
electrical fields. However, normal precautions are
advised to avoid application of any voltages higher
than maximum rated voltages to this high-impedance
circuit. Reliability of operation is enhanced if unused
inputs are tied to an appropriate voltage level.
DD
DD
and V
/V
Freescale Semiconductor, Inc.
SS
For More Information On This Product,
SS
pairs, including V
layers of the PCB with approximately 100 F, preferably with a high-
Go to: www.freescale.com
DD
and GND circuits.
CAUTION
DDA
/V
SS
SSA.
(GND) pin.
Ceramic and tantalum capacitors tend to
DDA
and V
Electrical Design Considerations
SSA
DD
pin on the hybrid
pins.
DD
and
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