DSP56F803 Motorola Inc, DSP56F803 Datasheet - Page 33

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DSP56F803

Manufacturer Part Number
DSP56F803
Description
16-bit Hybrid Controller
Manufacturer
Motorola Inc
Datasheet

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3.9 Quad Timer Timing
Operating Conditions:
56F803 Technical Data
SCLK (CPOL = 0)
SCLK (CPOL = 1)
Timer input period
Timer input high/low period
Timer output period
Timer output high/low period
(Output)
(Input)
(Input)
(Input)
(Input)
1.
2.
MISO
MOSI
SS
Parameters listed are guaranteed by design.
In the formulas listed, T = clock cycle. For 80MHz operation, T = 12.5ns.
Characteristic
V
SS
= V
Freescale Semiconductor, Inc.
t
Figure 23. SPI Slave Timing (CPHA = 1)
DV
t
DS
SSA
For More Information On This Product,
t
A
= 0 V, V
t
Table 31. Timer Timing
ELD
Slave MSB out
Go to: www.freescale.com
DD
MSB in
= V
Symbol
P
t
P
P
C
OUTHL
P
INHL
OUT
DDA
IN
t
t
CL
CH
= 3.0–3.6V, T
t
t
CH
CL
4T+6
2T+3
t
Min
DH
2T
1T
Bits 14–1
A
Bits 14–1
t
= –40 to +85 C, C
DV
1, 2
t
F
t
R
Max
t
L
R
t
F
t
DI
50pF, f
LSB in
Slave LSB out
Quad Timer Timing
OP
t
ELG
Unit
= 80MHz
t
ns
ns
ns
ns
D
33

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