DSP56F803 Motorola Inc, DSP56F803 Datasheet - Page 11

• Manufacturer Part Number: DSP56F803
• Description: 16-bit Hybrid Controller
• Manufacturer: Motorola Inc

2.6 Pulse Width Modulator (PWM) Signals
56F803 Technical Data
No. of
No. of
Pins
Pins
1
1
6
3
3
FAULTA0
EXTBOOT
PWMA0
RESET
ISA0
Signal
Name
Signal
Name
Table 10. Interrupt and Program Control Signals (Continued)
–
2
–
–
5
2
Table 11. Pulse Width Modulator (PWMA) Signals
(Schmitt)
(Schmitt)
(Schmitt)
(Schmitt)
Signal
Type
Input
Input
Signal
Output
Type
Input
Input
Freescale Semiconductor, Inc.
For More Information On This Product,
State During
State During
Tri-stated
Reset
Reset
Input
Input
Input
Input
Go to: www.freescale.com
PWMA0
ISA0
top/bottom pulse width correction in complementary channel
operation for PWMA.
FAULTA0
disabling selected PWMA outputs in cases where fault
conditions originate off-chip.
Reset—This input is a direct hardware reset on the
processor. When RESET is asserted low, the hybrid
controller is initialized and placed in the Reset state. A
Schmitt trigger input is used for noise immunity. When the
RESET pin is deasserted, the initial chip operating mode is
latched from the EXTBOOT pin. The internal reset signal will
be deasserted synchronous with the internal clocks, after a
fixed number of internal clocks.
To ensure a complete hardware reset, RESET and TRST
should be asserted together. The only exception occurs in a
debugging environment when a hardware device reset is
required and it is necessary not to reset the OnCE/JTAG
module. In this case, assert RESET, but do not assert TRST.
External Boot—This input is tied to V
boot from off-chip memory. Otherwise, it is tied to V
–
2— These three input current status pins are used for
–
5— These are six PWMA output pins.
–
2— These three fault input pins are used for
Pulse Width Modulator (PWM) Signals
Signal Description
Signal Description
DD
to force device to
SS
.
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