DSP56F803 Motorola Inc, DSP56F803 Datasheet - Page 26

• Manufacturer Part Number: DSP56F803
• Description: 16-bit Hybrid Controller
• Manufacturer: Motorola Inc

3.6 External Bus Asynchronous Timing
Operating Conditions:
26
Address Valid to WR Asserted
WR Width Asserted
Wait states = 0
Wait states > 0
WR Asserted to D0–D15 Out Valid
Data Out Hold Time from WR Deasserted
Data Out Set Up Time to WR Deasserted
Wait states = 0
Wait states > 0
RD Deasserted to Address Not Valid
Address Valid to RD Deasserted
Wait states = 0
Wait states > 0
Input Data Hold to RD Deasserted
RD Assertion Width
Wait states = 0
Wait states > 0
Address Valid to Input Data Valid
Wait states = 0
Wait states > 0
Address Valid to RD Asserted
RD Asserted to Input Data Valid
Wait states = 0
Wait states > 0
WR Deasserted to RD Asserted
RD Deasserted to RD Asserted
WR Deasserted to WR Asserted
RD Deasserted to WR Asserted
1.
T = Clock Period. For 80MHz operation, T = 12.5ns.
2.
To calculate the required access time for an external memory for any frequency < 80Mhz, use this formula:
Top = Clock period @ desired operating frequency
WS = Number of wait states
Memory Access Time = (Top*WS) + (Top- 11.5)
Timing is both wait state and frequency dependent. In the formulas listed, WS = the number of wait states and
Parameters listed are guaranteed by design.
Characteristic
Table 28. External Bus Asynchronous Timing
V
SS
= V
Freescale Semiconductor, Inc.
SSA
For More Information On This Product,
= 0 V, V
Go to: www.freescale.com
DD
= V
DDA
= 3.0–3.6 V, T
Symbol
t
t
t
t
t
t
WRWR
t
t
WRRD
RDWR
t
t
t
t
RDRD
t
ARDD
ARDA
AWR
t
WRD
DOH
DOS
DRD
t
RDD
RDA
t
WR
RD
AD
A
(T*WS) + 18.7
= –40 to +85 C, C
(T*WS) + 7.5
(T*WS) + 6.4
(T*WS) + 19
18.7
14.1
12.8
Min
-4.4
6.5
7.5
4.8
2.2
6.8
19
—
—
—
—
—
0
0
0
L
1, 2
(T*WS) + 2.4
50pF, f
(T*WS) + 1
56F803 Technical Data
Max
4.2
2.4
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1
op
= 80MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns