DSP56F803 Motorola Inc, DSP56F803 Datasheet - Page 36

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DSP56F803

Manufacturer Part Number
DSP56F803
Description
16-bit Hybrid Controller
Manufacturer
Motorola Inc
Datasheet

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Operating Conditions:
performance), ADC clock = 4MHz, 3.0–3.6V, T
36
Power-up time
Conversion time
Sample time
Input capacitance
Gain Error (transfer gain)
Offset Voltage
Total Harmonic Distortion
Signal-to-Noise plus Distortion
Effective Number of Bits
Spurious Free Dynamic Range
Bandwidth
ADC Quiescent Current (both ADCs)
V
REF
1.
2.
3.
4.
1.
a digital output code of 0.
2.
to V
3.
4.
5.
6.
Quiescent Current (both ADCs)
DDA
Parasitic capacitance due to package, pin to pin, and pin to package base coupling. (1.8pf)
Parasitic capacitance due to the chip bond pad, ESD protection devices and signal routing. (2.04pf)
Equivalent resistance for the ESD isolation resistor and the channel select mux. (500 ohms)
Sampling capacitor at the sample and hold circuit. (1pf)
For optimum ADC performance, keep the minimum V
V
Measured in 10-90% range.
LSB = Least Significant Bit.
Guaranteed by characterization.
t
AIC
REF
ADC analog input
-0.3V.
= 1/
Characteristic
must be equal to or less than V
5
f
ADIC
V
5
SS
5
5
Table 34. ADC Characteristics (Continued)
Figure 28. Equivalent Analog Input Circuit
= V
1
Freescale Semiconductor, Inc.
5
5
SSA
For More Information On This Product,
= 0 V, V
DDA
A
Go to: www.freescale.com
DD
= –40 to +85 C, C
V
Symbol
and must be greater than 2.7V. For optimal ADC performance, set V
= V
SINAD
ENOB
SFDR
t
E
OFFSET
I
2
ADPU
t
C
THD
I
t
VREF
BW
ADC
ADC
ADS
GAIN
ADI
DDA
= 3.0–3.6 V, V
ADCIN
L
0.95
Min
-80
60
55
65
value > 25mV. Inputs less than 25mV may convert to
9
50pF, f
REF
= V
3
OP
DD
= 80MHz
1.00
Typ
100
-15
16
64
60
10
70
50
12
6
1
5
-0.3V, ADCDIV = 4, 9, or 14, (for optimal
4
Max
1.10
16.5
+20
56F803 Technical Data
t
t
t
AIC
AIC
AIC
Unit
KHz
pF
mV
mA
mA
cycles
cycles
cycles
dB
dB
dB
bit
REF
6
6
6
6

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