VT6516 ETC, VT6516 Datasheet - Page 3

• Manufacturer Part Number: VT6516
• Description: 16/12 PORT 10/1000 ASE T/TX
• Manufacturer: ETC

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SECTION I FUNCTIONAL DESCRIPTIONS...................................................................................... 19
SECTION II REGISTER MAP............................................................................................................... 36
SECTION III ELECTRICAL SPECIFICATIONS................................................................................. 65
ABLE OF
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F
R
F
B
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1. G
2. T
3. I
4. F
1. R
2 CPU I
3 S
4. D
A
DC C
AC C
P
UMPER
IGURES AND
EATURES
IN
ACKAGE
ABLE OF
OGIC
EVERSION
LOCK
ALL OUT
BSOLUTE
RMII-mode Ball out Diagram ........................................................................................................... 11
MII-mode Ballout Diagram............................................................................................................... 12
2.1 Switch initialization procedures .................................................................................................. 19
2.2 Packet receiving and forwarding follow .......................................¿ ù » ~ ! © | ¥ ¼ © w ¸ q ® Ñ Å Ò ¡ C
3.1 Buffer Memory (SDRAM) Interface and Table (SRAM) interface..¿ ù » ~ ! © | ¥ ¼ © w ¸ q ® Ñ Å Ò ¡ C
4.1 Packet Reception and Address recognition.................................................................................. 33
4.2 Packet Forwarding and VLAN..................................................................................................... 33
4.3 Network Management Features................................................................................................... 34
4.1 Registers of SDRAM Control Module......................................................................................... 44
4.2 Registers of SRAM Control Module............................................................................................ 46
4.4 Registers of Buffer Control Module............................................................................................. 48
4.5 Registers of Forwarding Control Module ................................................................................... 49
4.6 Registers of PHY Control Module .............................................................................................. 53
4.7 Registers of EEPROM Control Module ....................................................................................... 55
4.8 Registers of CPU Interface Module............................................................................................. 56
4.9 Registers of MAC/IO Control Module ......................................................................................... 59
4.10 Registers of CPU IO Control Module....................................................................................... 63
NTERFACE
D
UNCTIONAL
WITCH
HE
ENERAL
ETAIL OF
EGISTER
ESCRIPTIONS
HARACTERISTICS
HARACTERISTICS
S
VIA E
D
YMBOL
S
NTERFACE
VIA Technologies, Inc.
IAGRAM
TRAPPING
M
C
D
................................................................................................................................................ 6
I
M
ONTENTS
H
NTERNAL
C
IAGRAM
ECHANICAL
D
AXIMUM
ISTORY
T
S
T
THER
D
ESCRIPTION
ONTENTS
WITCH
ABLES
ABLES
...................................................................................................................................... 13
ESCRIPTIONS
D
...................................................................................................................................... 9
ESCRIPTION
.................................................................................................................................. 14
R
................................................................................................................................. 18
S
............................................................................................................................... 11
EGISTERS
WITCH
................................................................................................................................ 3
................................................................................................................................ 5
R
............................................................................................................................... 4
............................................................................................................................. 36
R
R
............................................................................................................................ 65
............................................................................................................................ 65
EGISTERS
EGISTER
ATINGS
S
PECIFICATIONS
...................................................................................................................... 19
A
................................................................................................................... 20
RCHITECTURE
................................................................................................................. 33
M
............................................................................................................... 65
.............................................................................................................. 44
AP
M
......................................................................................................... 36
AP
..................................................................................................... 37
................................................................................................. 73
............................................................................................ 19
3
Preliminary VT6516 Datasheet