MT93L00AB Zarlink Semiconductor, MT93L00AB Datasheet - Page 9

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MT93L00AB

Manufacturer Part Number
MT93L00AB
Description
Description = Multi-channel Voice Echo CANceller ;; Package Type = LQFP ;; No. Of Pins = 100
Manufacturer
Zarlink Semiconductor
Datasheet
Preliminary Information
Once a Tone Detector has been triggered, there is
no longer a need for a valid disable tone (G.164 or
G.165) to maintain Tone Detector status (i.e. TD bit
high). The Tone Detector status will only release (i.e.
TD bit low) if the signals Rin and Sin fall below -
30dBm0, in the frequency range of 390Hz to 700Hz,
and below -34dBm0, in the frequency range of
700Hz to 3400Hz, for at least 400ms. Whenever a
Tone Detector releases, an interrupt is generated
(i.e. IRQ pin low).
The selection between G.165 and G.164 tone
disable is controlled by the PHDis bit in Control
Register 2 on a per channel basis. When the PHDis
bit is set to 1, G.164 tone disable requirements are
selected.
In response to a valid disable tone, the echo
canceller must be switched from the Enable
Adaptation state to the Bypass state. This can be
done in two ways, automatically or externally. In
automatic mode, the Tone Detectors internally
control the switching between Enable Adaptation
and Bypass states. The automatic mode is activated
by setting the AutoTD bit in Control Register 2 to
high. In external mode, an external controller is
needed to service the interrupts and poll the TD bits
in the Status Registers. Following the detection of a
disable tone (TD bit high) on a given channel, the
external controller must switch the echo canceller
from Enable Adaptation to Bypass state.
Instability Detector
In systems with very low echo channel return loss
(ERL), there may be enough feedback in the loop to
cause stability problems in the adaptive filter. This
instability can result in variable pitched ringing or
oscillation. Should this ringing occur, the Instability
Detector will activate and suppress the oscillations.
The Instability Detector is activated by setting the
RingClr bit in Control Register A3/B3 to "1".
Narrow Band Signal Detector (NBSD)
Single or dual frequency tones (i.e. DTMF tones)
present in the receive input (Rin) of the echo
canceller for a prolonged period of time may cause
the Adaptive Filter to diverge. The Narrow Band
Signal Detector (NBSD) is designed to prevent this
by detecting single or dual tones of arbitrary
frequency, phase, and amplitude. When narrow band
signals are detected, adaptation is halted but the
echo canceller continues to cancel echo.
The NBSD can be disabled by setting the NBDis bit
to “1” in Control Register 2.
Offset Null Filter
Adaptive filters in general do not operate properly
when a DC offset is present at any inputs. To remove
the DC component, the MT93L00 incorporates Offset
Null filters in both Rin and Sin inputs.
The offset null filters can be disabled by setting the
HPFDis bit to “1” in Control Register 2.
ITU-T G.168 Compliance
The MT93L00 has been certified G.168 compliant in
all 64 ms cancellation modes (i.e. Normal and Back-
to-Back configurations) by in-house testing with the
DSPG ECT-1 echo canceller tester.
It should be noted that G.168 compliance is not
claimed for the 128 ms Extended Delay mode,
although subjectively no difference can be noticed.
Device Configuration
The
cancellers divided into 16 groups. Each group has
two echo cancellers which can be individually
controlled (Echo Canceller A and B). They can be set
in three distinct configurations: Normal, Back-to-
Back, and Extended Delay. See Figure 5.
Normal Configuration
In Normal configuration, the two echo cancellers
(Echo Canceller A and B) are positioned in parallel,
as shown in Figure 5a, providing 64 milliseconds of
echo cancellation in two channels simultaneously.
Back-to-Back Configuration
In
cancellers from the same group are positioned to
cancel echo coming from both directions in a single
channel
cancellation. See Figure 5c. This configuration uses
only one timeslot on PORT1 and PORT2 and the
second timeslot normally associated with ECB
contains undefined data. Back-to-Back configuration
allows a no-glue interface for applications where
bidirectional echo cancellation is required.
Back-to-Back configuration is selected by writing “1”
into the BBM bit of both Control Register A1 and
Control Register B1 of a given group of echo
Back-to-Back
MT93L00
providing
architecture
configuration,
full-duplex
contains
the
MT93L00A
64ms
two
32
echo
echo
echo
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