MAXQ3108 Maxim Integrated Products, MAXQ3108 Datasheet - Page 7

• Manufacturer Part Number: MAXQ3108
• Description: Dual-Core Microcontroller
• Manufacturer: Maxim Integrated Products

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2–7, 23, 22
10, 11, 12,
13, 14, 18,
15, 16
PIN
21
17
20
19
24
P0.0–P0.7
P1.0–P1.6
CX1, CX2
REGOUT
NAME
_______________________________________________________________________________________
GND
V
V
BAT
DD
Low-Power, Dual-Core Microcontroller
Supply Voltage. Must be bypassed with a 4.7μF capacitor with ESR < 5
capacitor.
Ground
Regulator Output. 1.8V output. Must be connected to a 1μF low-ESR (< 1 ) external ceramic chip
capacitor.
Battery Input for Backing Up the RTC
RTC Crystal Inputs. The RTC requires a 32.768kHz crystal to be connected in order to supply the
time base for the RTC. The 6pF load capacitors are included in the circuitry.
Port 0. Port 0 functions as both an 8-bit I/O port and as a special function interface to the I
master and serial UARTs 0 and 1. All pins support external interrupt functionality. The default
reset condition of the pins is weakly pulled up (input). To drive output, either the port direction
register must be programmed to enable output or the alternate function module must be
configured to drive the pins. This port is accessible to the UserCore only.
Port 1. Port 1 functions as both a 6-bit I/O port and as a special function interface to the JTAG
compatible test access port (TAP), the RTC square-wave output, and as the input/output to and
from timer B. All pins support external interrupt functionality. The default reset condition of pins
P1.0–P1.3 is the JTAG functions. To use the 4-bit port as standard GPIO, the TAP must be
disabled by user code. This port is accessible to the UserCore only.
Active-Low Reset (
an internal pullup resistor to allow for a combination of wired-OR external reset sources. An RC is
not required for power-up, as this function is provided internally. The RST pin function is enabled
on power-on reset. It is critical that this pin not be held low externally after a power-on reset or the
device cannot exit the reset state.
PIN
PIN
23
22
10
11
12
13
14
18
24
2
3
4
5
6
7
). The RST pin recognizes external active-low reset inputs and employs
POWER PINS
CLOCK PINS
I/O PINS
PORT
PORT
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
FUNCTION
ALTERNATE FUNCTION
ALTERNATE FUNCTION
MDIN1P/T2PB/INT3
MDIN1N/T2P/INT2
TDO/SQW/INT11
RXD0/INT1
RXD1/INT7
TXD0/INT0
TXD1/INT6
TDI/INT10
SDA/INT4
TMS/INT8
TCK/INT9
SCL/INT5
Pin Description
TBB
TBA
RST
and a 0.1μF ceramic
2
C
7