P60ARM-B Zarlink Semiconductor, Inc., P60ARM-B Datasheet - Page 91

• Manufacturer Part Number: P60ARM-B
• Description: 32-bit RISC microprocessor
• Manufacturer: Zarlink Semiconductor, Inc.

7.15 UndeÞned instructions and coprocessor absent
When a coprocessor detects a coprocessor instruction which it cannot perform, and this must include all
undefined instructions, it must not drive CPA or CPB LOW. These will remain HIGH, causing the
undefined instruction trap to be taken. Cycle timings are shown in Table 21: Undefined Instruction Cycle
Operations.
7.16 Unexecuted instructions
Any instruction whose condition code is not met will fail to execute. It will add one cycle to the execution
time of the code segment in which it is embedded (see Table 22: Unexecuted Instruction Cycle Operations).
not ready
ready
Cycle
1
2
4
3
Cycle
n+1
1
2
1
2
n
Address
pc+8
pc+8
Xn
Xn+4
Xn+8
•
Address
pc+8
pc+12
pc+12
pc+8
pc+8
pc+8
pc+8
pc+12
pc+12
Table 20: Coprocessor register transfer (Store to coprocessor)
nBW
Table 21: Undefined Instruction Cycle Operations
1
1
1
1
nBW
nRW
1
1
1
1
1
1
1
0
0
0
0
nRW
(Xn+4)
0
0
0
0
0
1
(pc+8)
1
Data
(Xn)
-
(pc+8)
(pc+8)
Data
Rd
Rd
Instruction Cycle Operations
-
-
-
nMREQ
1
0
0
0
nMREQ
1
0
1
1
1
1
0
SEQ
0
0
1
1
SEQ
1
0
0
0
0
1
0
nOPC
0
0
0
0
nOPC
0
1
0
1
1
1
1
nCPI
0
1
1
1
nCPI
0
1
0
0
0
0
1
CPA
1
1
1
1
CPA
0
1
0
0
0
0
1
CPB
1
1
1
1
CPB
87
0
1
1
1
1
0
1