P60ARM-B Zarlink Semiconductor, Inc., P60ARM-B Datasheet - Page 56

• Manufacturer Part Number: P60ARM-B
• Description: 32-bit RISC microprocessor
• Manufacturer: Zarlink Semiconductor, Inc.

P60ARM-B
4.11 Coprocessor data operations (CDP)
The instruction is only executed if the condition is true. The various conditions are defined at the beginning
of this chapter. The instruction encoding is shown in Figure 25: Coprocessor Data Operation Instruction.
This class of instruction is used to tell a coprocessor to perform some internal operation. No result is
communicated back to ARM60, and it will not wait for the operation to complete. The coprocessor could
contain a queue of such instructions awaiting execution, and their execution can overlap other ARM60
activity allowing the coprocessor and ARM60 to perform independent tasks in parallel.
4.11.1 The Coprocessor Þelds
Only bit 4 and bits 24 to 31 are significant to ARM60; the remaining bits are used by coprocessors. The above
field names are used by convention, and particular coprocessors may redefine the use of all fields except
CP# as appropriate. The CP# field is used to contain an identifying number (in the range 0 to 15) for each
coprocessor, and a coprocessor will ignore any instruction which does not contain its number in the CP#
field.
The conventional interpretation of the instruction is that the coprocessor should perform an operation
specified in the CP Opc field (and possibly in the CP field) on the contents of CRn and CRm, and place the
result in CRd.
4.11.2 Instruction Cycle Times
Coprocessor data operations take 1S + bI incremental cycles to execute, where S and I are as defined in
section 5.1 Cycle types on page 65.
b
52
31
Cond
is the number of cycles spent in the coprocessor busy-wait loop.
28
27
1110
24
Figure 25: Coprocessor Data Operation Instruction
23
CP Opc
20
19
CRn
16
15
CRd
12
11
Coprocessor operand register
Coprocessor information
Coprocessor number
Coprocessor destination register
Coprocessor operand register
Coprocessor operation code
Condition field
CP#
8
7
CP
5 4 3
0
CRm
0