P60ARM-B Zarlink Semiconductor, Inc., P60ARM-B Datasheet - Page 37

• Manufacturer Part Number: P60ARM-B
• Description: 32-bit RISC microprocessor
• Manufacturer: Zarlink Semiconductor, Inc.

(4)
{cond} - two-character condition mnemonic, see Figure 6: Condition Codes
Rd and Rm are expressions evaluating to a register number other than R15
<psr> is CPSR, CPSR_all, SPSR or SPSR_all. (CPSR and CPSR_all are synonyms as are SPSR and SPSR_all)
<psrf> is CPSR_flg or SPSR_flg
Where <#expression> is used, the assembler will attempt to generate a shifted immediate 8-bit field to
match the expression. If this is impossible, it will give an error.
4.5.5 Examples
In User mode the instructions behave as follows:
In privileged modes the instructions behave as follows:
MSR - transfer immediate value to PSR flag bits only
MSR{cond} <psrf>,<#expression>
The expression should symbolise a 32 bit value of which the most significant four bits are written
to the N,Z,C & V flags respectively.
MSR
MSR
MSR
MRS
MSR
MSR
MSR
MRS
MSR
MSR
MSR
MRS
CPSR_all,Rm
CPSR_flg,Rm
CPSR_flg,#0xA0000000 ; CPSR[31:28] <- 0xA
Rd,CPSR
CPSR_all,Rm
CPSR_flg,Rm
CPSR_flg,#0x50000000 ; CPSR[31:28] <- 0x5
Rd,CPSR
SPSR_all,Rm
SPSR_flg,Rm
SPSR_flg,#0xC0000000 ; SPSR_<mode>[31:28] <- 0xC
Rd,SPSR
; CPSR[31:28] <- Rm[31:28]
; CPSR[31:28] <- Rm[31:28]
;
; Rd[31:0] <- CPSR[31:0]
; CPSR[31:0]
; CPSR[31:28] <- Rm[31:28]
;
; Rd[31:0] <- CPSR[31:0]
; SPSR_<mode>[31:0]
; SPSR_<mode>[31:28] <- Rm[31:28]
;
; Rd[31:0] <- SPSR_<mode>[31:0]
Instruction Set - MRS, MSR
(i.e. set N,C; clear Z,V)
(i.e. set Z,V; clear N,C)
(i.e. set N,Z; clear C,V)
<- Rm[31:0]
<- Rm[31:0]
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