S1D13503 Epson Electronics America, Inc., S1D13503 Datasheet - Page 32

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S1D13503

Manufacturer Part Number
S1D13503
Description
S1d13503 Graphics Lcd Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet

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Page 24
S1D13503
X18A-A-001-08
Pin
Name
VD0-
VD15
VA0-
VA15
VCS1# O
VCS0# O
VWE# O
VOE#
Type
I/O
O
O
F00A
Pin #
44 - 51,
54 - 61
33 - 43,
62 - 66
69
68
67
83
F01A
Pin #
41 - 48,
51 - 58
30 - 40
59 - 63
66
65
64
80
D00A
Pad #
54-55,
57-61,
64,
68-75
38-40,
42-43,
45-46,
48-49,
51-52,
77-81
84
83
82
102
Table 5-2: Display Memory Interface
Driver
TS1D2
CO1
CO1
CO1
CO1
CO1
Description
These pins are connected to the display memory data bus. For 16-
bit interface, VD0-VD7 are connected to the display memory data
bus of even byte addresses and VD8-VD15 are connected to the
display memory data bus of odd byte addresses. The output drivers
of these pins are placed in a high impedance state when RESET is
high.
On the falling edge of RESET, the values of VD0-VD15 are
latched into the chip to configure various hardware options (see
Section Table 5-6: on page 26).
VD0-VD15 each have an internal pull-down resistor (see Section
Table 6-3: on page 27).
These pins are connected to the display memory address bus.
Active low chip-select output to the second or odd byte address
SRAM. See Display Memory Interface section for details.
Active low chip-select output to the first or even byte address
SRAM. See Display Memory Interface section for details.
Active low output used for writing data to the display memory.
This pin is connected to the WE# input of the SRAMs.
Active low output to enable reading of data from the display
memory. This pin is connected to the OE# input of the SRAMs.
Hardware Functional Specification
Epson Research and Development
Vancouver Design Center
Issue Date: 01/01/29

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