S1D13503 Epson Electronics America, Inc., S1D13503 Datasheet - Page 247

• Manufacturer Part Number: S1D13503
• Description: S1d13503 Graphics Lcd Controller
• Manufacturer: Epson Electronics America, Inc.

Epson Research and Development
Vancouver Design Center
3 8-BIT ISA BUS INTERFACE
ISA Bus Interface Considerations
Issue Date: 01/01/30
1.
Note
Partial decoding is quite safe on most ISA Bus systems as I/O addresses above 03FFh are rarely used.
2.
3.
Note
The 74LS00 is simply used to detect the $B segment and invalidate the MEMCS# input.
Note
This memory configuration may conflict with a VGA card installed on the same bus, therefore either a
serial terminal or monochrome display adapter is recommended as the primary console.
This section provides the necessary settings to complete the interface between the S1D13503 and the 8-bit ISA Bus. Since
I/O addresses are partially decoded, there is no need to use a PAL for decoding.
For the purpose of the example shown below, the following conditions apply:
Indexed I/O with partial decoding, i.e. address lines A10 to A15 are not decoded for I/O cycles
I/O addresses are 0300h and 0301h (xxxxxx1100000000b and xxxxxx1100000001b)
64Kbytes of display memory occupying $A segment
8-Bit ISA Bus
REFRESH
SMEMW#
IOCHRDY
SMEMR#
SA0-19
SD0-7
IOW#
IOR#
AEN
SA16
Figure 2: 8-Bit ISA Bus Implementation
4
5
B
74LS00
6
1
2
A
3
IOCS#
MEMCS#
AB0-19
DB0-7
MEMW
MEMR
IOW#
IOR#
READY
S1D13503
VD11-13,
BHE#
VD15
X18A-G-003-05
V
CC
10k
S1D13503
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