S1D13503 Epson Electronics America, Inc., S1D13503 Datasheet - Page 262
S1D13503
Manufacturer Part Number
S1D13503
Description
S1d13503 Graphics Lcd Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S1D13503.pdf
(270 pages)
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Page 6
2 CONFIGURATION EQUATIONS
2.1 Example
2.1.1 Input Clock Requirement Calculation
S1D13503
X18A-G-005-05
This application note will follow one example through all the required calculations. For a complete description of all
formula and associated parameters refer to the Hardware Functional Specification.
LCD panel resolution:
LCD panel configuration:
LCD colors:
Desired frame-rate:
S1D13503 operating voltage:
For a frame rate of 70Hz, the input clock (or pixel clock) frequency can be calculated as following:
Where DHNDP is Default Horizontal Non-Display Period in term of pixels:
Where PHNDP is Programmable Horizontal Non-Display Period in term of pixels:
Note
For this example we will use DHNDP = 32, PHNDP = 0
Therefore:
f
f
f
f
OSC
OSC
OSC
OSC
DHNDP = 16 pixels in gray shade display modes, and
DHNDP = 32 pixels in BW display mode and in color display modes.
PHNDP = 0 pixels when AUX[0C] = 0, and
PHNDP =
=
= input clock
= 70 * (320 + 32) * (240 + 4)
= 6.0 MHz
FrameRate
---------------------------------------------------------------------------------------------------------------- -
AUX 0C
NumberOfHorizontalPixels
+
8-bit, single panel, single drive panel
320x240
256
70Hz
3.3v
1
BitsPerPixel
MemoryInterfaceWidth
+
PHNDP
pixels when AUX[0C] not equal to zero.
+
DHNDP
LCD Panel Options / Memory Requirements
Epson Research and Development
NumberOfVerticalLines
Vancouver Design Center
Issue Date: 01/01/30
+
4