S1D13503 Epson Electronics America, Inc., S1D13503 Datasheet - Page 218

• Manufacturer Part Number: S1D13503
• Description: S1d13503 Graphics Lcd Controller
• Manufacturer: Epson Electronics America, Inc.

Page 8
2 INSTALLATION AND CONFIGURATION
S1D13503
X18A-G-007-05
The S1D13503 uses the display memory data lines (VD[15:0]) as configuration inputs which are read on power-up. For the
purpose of this design, most of these configuration inputs have been factory set and therefore are not configurable. An eight
position DIP switch is provided for the selection of the following:
Note
The polarity of the Configuration Dip Switches is Closed = “1” or “high”, Open = “0” or “low”.
Note
VD[15:0] have internal pull-down resistors and therefore external pull-up resistors are only required if
the configuration option requires a “1” state on power-up.
Factory set fixed options on this board are:
Direct-mapping I/O is only available for Non-ISA Bus support. When using direct-mapped I/O, the I/O address is
$03yx (0000 0011 0yyy xxxx), where x is don’t care and yyy can be configured with dip-switch SW1-5 through SW1-7.
If yyy = 001, then the I/O address for Aux[00] = $0310, I/O address for Aux[01] = $0311, I/O address for AUX[02] = $0312
and so on. (See Non-ISA Bus Support, on page 14.)
I/O Mapping Address (Hex)
Switch
SW1-1
SW1-2
SW1-3
SW1-4
SW1-5
SW1-6
SW1-7
SW1-8
•
•
•
Table 2-2: I/O Mapping Example
Signal
VD0
VD1
VD2
VD3
VD7
VD8
VD9
16-bit display memory interface.
All 128K bytes of video memory is available at memory segment $D with software selecting one of two 64K
memory banks (See “SRAM Support” on page 14).
This board is pre-set to use indexed I/O with address $03y0 (0000 0011 0yyy 000x), where x is don’t care
and yyy can be configured with dip-switch SW1-5 through SW1-7. The factory setting of yyy = 001, i.e., I/O
address = $0310 and $0311.
-
16-bit ISA Bus interface
Direct-mapping I/O
M68K CPU Interface
Byte-swap high and low data bytes
I/O mapping address bit 4
I/O mapping address bit 5
I/O mapping address bit 6
Reserved
bit 6 bit 5 bit 4
0
Table 2-1: Configuration DIP Switch Settings
Closed
0
1
S5U13503B00C Rev. 1.0 Evaluation Board User Manual
8-bit ISA Bus interface
Indexed I/O
ISA Bus Interface
No byte-swap
See Table 2-2, “I/O Mapping Example”
Reserved
Epson Research and Development
Open
Vancouver Design Center
Issue Date: 01/01/30