ST72324BJ4-auto STMicroelectronics, ST72324BJ4-auto Datasheet - Page 27
ST72324BJ4-auto
Manufacturer Part Number
ST72324BJ4-auto
Description
8-bit MCU for automotive, 3.8 to 5.5V operating range with 16 Kbyte Flash, 10-bit ADC, 4 timers, SPI, SCI
Manufacturer
STMicroelectronics
Datasheet
1.ST72324BJ2-AUTO.pdf
(198 pages)
Specifications of ST72324BJ4-auto
Hdflash Endurance
100 cycles, data retention 20 years
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and external clock input
4 Power Saving Modes
Slow, Wait, Active Halt, and Halt
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ST72324B-Auto
5.3.1
5.3.2
5.3.3
5.3.4
Accumulator (A)
The Accumulator is an 8-bit general purpose register used to hold operands and the results
of the arithmetic and logic calculations and to manipulate data.
Index registers (X and Y)
These 8-bit registers are used to create effective addresses or as temporary storage areas
for data manipulation. (The Cross-Assembler generates a precede instruction (PRE) to
indicate that the following instruction refers to the Y register.)
The Y register is not affected by the interrupt automatic procedures.
Program counter (PC)
The program counter is a 16-bit register containing the address of the next instruction to be
executed by the CPU. It is made of two 8-bit registers PCL (Program Counter Low which is
the LSB) and PCH (Program Counter High which is the MSB).
Condition Code register (CC)
The 8-bit Condition Code register contains the interrupt masks and four flags representative
of the result of the instruction just executed. This register can also be handled by the PUSH
and POP instructions. These bits can be individually tested and/or controlled by specific
instructions.
Table 6.
CC
BIt Name
4
2
R/W
7
1
H
N
Half carry
Negative
Arithmetic management bits
This bit is set by hardware when a carry occurs between bits 3 and 4 of the ALU
during an ADD or ADC instructions. It is reset by hardware during the same
instructions.
0: No half carry has occurred.
1: A half carry has occurred.
This bit is tested using the JRH or JRNH instruction. The H bit is useful in BCD
arithmetic subroutines.
This bit is set and cleared by hardware. It is representative of the result sign of the last
arithmetic, logical or data manipulation. It is a copy of the result 7th bit.
0: The result of the last operation is positive or null.
1: The result of the last operation is negative (that is, the most significant bit is a logic
1.
This bit is accessed by the JRMI and JRPL instructions.
R/W
6
1
R/W
I1
5
Doc ID13466 Rev 4
R/W
H
4
Function
R/W
I0
3
Central processing unit (CPU)
R/W
N
2
Reset value: 111x1xxx
R/W
1
Z
R/W
C
0
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