ST10F273Z4 STMicroelectronics, ST10F273Z4 Datasheet - Page 175

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ST10F273Z4

Manufacturer Part Number
ST10F273Z4
Description
16-BIT MICROCONTROLLER WITH MAC UNIT, UP TO 832 KBYTES FLASH MEMORY AND UP TO 68 KBYTES RAM
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST10F273Z4

Single Voltage Supply
5 V ±10%

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ST10F273Z4
Slave mode
V
Table 83.
1. Maximum Baudrate is in reality 8Mbaud, that can be reached with 64 MHz CPU clock and <SSCBR> set to
2. Formula for SSC Clock Cycle time: t
t
t
t
t
t
t
t
t
t
t
t
310
311
312
313
314
315
316
317p
318p
317
318
DD
Symbol
‘3h’, or with 48 MHz CPU clock and <SSCBR> set to ‘2h’. When 40 MHz CPU clock is used the maximum
baudrate cannot be higher than 6.6Mbaud (<SSCBR> = ‘2h’) due to the limited granularity of <SSCBR>.
Value ‘1h’ for <SSCBR> may be used only with CPU clock lower than 32 MHz (after checking that resulting
timings are suitable for the master).
Where <SSCBR> represents the content of the SSC Baudrate register, taken as unsigned 16-bit integer.
Minimum limit allowed for t
= 5V ±10%, V
CC
CC
SR SSC clock cycle time
SR SSC clock high time
SR SSC clock low time
SR SSC clock rise time
SR SSC clock fall time
SR
SR
SR
SR
Write data valid after shift
edge
Write data hold after shift
edge
Read data setup time before
latch edge, phase error
detection on (SSCPEN = 1)
Read data hold time after
latch edge, phase error
detection on (SSCPEN = 1)
Read data setup time before
latch edge, phase error
detection off (SSCPEN = 0)
Read data hold time after
latch edge, phase error
detection off (SSCPEN = 0)
SSC slave mode timings
SS
Parameter
= 0V, T
310
is 125ns (corresponding to 8Mbaud).
A
= -40 °C to +125 °C, C
(2)
310
= 4 TCL * (<SSCBR> + 1)
(<SSCBR> = 0002h)
@F
Max. Baud rate
Min.
150
63
63
62
87
31
0
6
6.6 MBd
CPU
= 40 MHz
Max.
L
(1)
150
10
10
55
= 50 pF
t
t
4TCL + 12
6TCL + 12
310
310
2TCL + 6
(<SSCBR> = 0001h -
8TCL
Min.
Variable Baudrate
/ 2 – 12
/ 2 – 12
Electrical characteristics
0
6
FFFFh)
262144 TCL
2TCL + 30
Max.
10
10
175/188
Unit
ns

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